Abel Alaniz, Age 585570 Sterrett Pl UNIT 303, Columbia, MD 21044

Abel Alaniz Phones & Addresses

Columbia, MD

2702 Little Elm Trl, Cedar Park, TX 78613 (512) 426-0628

Edinburg, TX

Austin, TX

Rochester, MN

2702 Little Elm Trl, Cedar Park, TX 78613

Mentions for Abel Alaniz

Abel Alaniz resumes & CV records

Resumes

Abel Alaniz Photo 27

Student Worker For The Texas State School Of

Location:
2702 Little Elm Trl, Cedar Park, TX 78613
Industry:
Higher Education
Work:
Aquabrew Jun 2017 - Jun 2018
Booking Manager
Jun 2017 - Jun 2018
Student Worker For the Texas State School of
Texas State University Jun 2017 - Jun 2018
Student Worker For the Texas State School of Music
Education:
Texas State University 2017 - 2019
Masters
Abel Alaniz Photo 28

Abel Alaniz

Publications & IP owners

Us Patents

Method And System For Testing An Electronic Circuit To Identify Multiple Defects

US Patent:
7895490, Feb 22, 2011
Filed:
May 20, 2008
Appl. No.:
12/123547
Inventors:
Benjamin Robert Gass - Pflugerville TX, US
Abel Alaniz - Cedar Park TX, US
Asher Shlomo Lazarus - Austin TX, US
Timothy M. Skergan - Austin TX, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G01R 31/28
US Classification:
714732, 714726, 714733
Abstract:
A method for testing an electronic circuit comprises selecting a plurality of test patterns arranged in an order. The method tests an electronic circuit by applying to the electronic circuit a first subset range of the plurality of test patterns sequentially in the order, from a first test pattern to a first log interval after the first test pattern, thereby generating a first associated output. The method compares the first associated output with a first known output of the plurality of known outputs. In the event the first associated output does not match the first known output, the method stores indicia of the first mismatch; causes the electronic circuit to appear to assume the first known output state; and proceeds with additional test procedures.

Method And System For Lbist Testing Of An Electronic Circuit

US Patent:
8086925, Dec 27, 2011
Filed:
May 20, 2008
Appl. No.:
12/123540
Inventors:
Benjamin Robert Gass - Pflugerville TX, US
Abel Alaniz - Cedar Park TX, US
Asher Shlomo Lazarus - Austin TX, US
Timothy M. Skergan - Austin TX, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G01R 31/28
US Classification:
714738
Abstract:
A method for testing an electronic circuit comprises selecting a first log interval, a first log start pattern, a first log end pattern, and a first subset range of LBIST patterns from a plurality of LBIST patterns arranged in an order, wherein each LBIST pattern of the subset range of LBIST patterns causes an associated output of an electronic circuit. The method tests an electronic circuit in a first test by applying to the electronic circuit the first subset range of LBIST patterns sequentially in the order, thereby generating a first plurality of associated outputs. The method stores a first subset of associated outputs based on the first log interval, the first log start pattern, and the first log end pattern. The method compares the subset of associated outputs with known outputs to identify a first output mismatch.

Techniques For Performing A Logic Built-In Self-Test In An Integrated Circuit Device

US Patent:
2009032, Dec 31, 2009
Filed:
Jun 30, 2008
Appl. No.:
12/164699
Inventors:
ABEL ALANIZ - Austin TX, US
Robert B. Gass - Pflugerville TX, US
Asher S. Lazarus - Austin TX, US
Timothy M. Skergan - Austin TX, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - ARMONK NY
International Classification:
G01R 31/3177
G06F 11/25
US Classification:
714732, 714733, 714E11155
Abstract:
A method, system and computer program product for performing device characterization Logic Built-In Self-Test (LBIST) in an IC device. Test parameters of the LBIST are saved in a memory of the IC device, and nominal operational parameters of the IC device are used to define a signature of the LBIST. A determination whether the LBIST is passed or failed is made within the characterized IC device.

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