Alan D Raisanen, Age 615103 Pilgrimport Rd, Sodus, NY 14551

6767082, Jul 27, 2004

Jun 9, 2003

10/456750

Alan D Raisanen - Sodus NY

Xerox Corporation - Stamford CT

B41J 205

347 65

A variable geometry fluid ejection system can be used to minimize a separation between a main drop and satellite drop on a recording medium in a bi-directional fluid ejection system. The geometry of the fluid ejection system is varied by placing an actuator in an ejector nozzle to selectively vary the geometry of the nozzle between opposing directions of motion of the fluid ejection system across a recording medium, thereby maintaining a constant distance of main drop satellite drop separation between the opposing directions of motion.

6805433, Oct 19, 2004

May 19, 2003

10/440177

Alan D Raisanen - Sodus NY
Shelby F Nelson - Pittsford NY

Xerox Corporation - Stamford CT

B41J 205

347 65

A method of manufacturing a fluid ejection device having circular nozzles includes forming channels in a substrate, depositing a sacrificial material, such as photoresist, into channels to form a mold for the fluid channels and a fluid reservoir and then forming the remainder of the fluid ejection device above the sacrificial material on the substrate. Various novel fluid heater structures and an in situ fluid filter may be formed during the manufacturing process. The fluid ejection device can include a heater element located in the fluid chamber behind the nozzle opening. The geometry of the heating element can be planar. Alternatively, the heating element can be located inside the channel in either a half-cylindrical or fully-cylindrical configuration. The internal fluid pathways remain protected from contaminants by the sacrificial material. After all layers and manufacturing processes are complete, individual fluid ejection devices are diced and the sacrificial material is removed.

6905196, Jun 14, 2005

May 8, 2003

10/431540

Scott N. Seabridge - Penfield NY, US
Alan D. Raisanen - Sodus NY, US
Scott C. Warner - Ontario NY, US
Thomas A. Tellier - Wolcott NY, US
Cathie J. Burke - Rochester NY, US
William G. Hawkins - Webster NY, US

Xerox Corporation - Stamford CT

B41J002/05

347 58

A fluid ejector includes a fluid channel having a resistive heater and terminating in a nozzle, a common bus formed transverse to the fluid channel and between the resistive heater and the nozzle, a connection line laterally adjacent to the fluid channel, and a connection structure for electrically connecting the common bus with the resistive heater and the connection line, the connection structure including a first set of one or more layers for electrical connection and a second set of one or more layers for covering the common bus and connection line. The first set of one or more layers includes a doped polysilicon layer on or overlaid by an optional tantalum-silicide layer. The second set of one or more layers includes a nitride layer on or overlaid by a tantalum layer.

6927153, Aug 9, 2005

Feb 25, 2003

10/374305

Alan D. Raisanen - Sodus NY, US
Shelby F. Nelson - Pittsford NY, US

Xerox Corporation - Stamford CT

H01L021/22

438549, 438918

A method that includes providing a semiconductor substrate having a mask on a surface thereof. The mask includes a first region having no masking elements and a second region having a plurality of masking elements. Each of the plurality of masking elements has a dimension that is equal to a first length, the first length less than twice a diffusion length of a dopant. The method further includes bombarding the semiconductor substrate and masking element with ions of the dopant. The ions form a first impurity concentration in the first region and a second impurity concentration in the second region.

7495347, Feb 24, 2009

Jun 30, 2005

11/171654

Alan D. Raisanen - Sodus NY, US
Shelby F. Nelson - Pittsford NY, US

Xerox Corporation - Norwalk CT

H01L 21/027

257797, 438401, 438527, 438528, 438532, 438548, 438549, 438552, 438944, 438948, 257E21036, 257E21039, 257E21058, 257E21023

A method that includes providing a semiconductor substrate having a mask on a surface thereof. The mask includes a first region having no masking elements and a second region having a plurality of masking elements. Each of the plurality of masking elements has a dimension that is equal to a first length, the first length less than twice a diffusion length of a dopant. The method further includes bombarding the semiconductor substrate and masking element with ions of the dopant. The ions form a first impurity concentration in the first region and a second impurity concentration in the second region.

2003008, May 15, 2003

Nov 13, 2001

10/007945

Shelby Nelson - Pittsford NY, US
Alan Raisanen - Sodus NY, US

Xerox Corporation.

H01L021/332
H01L023/62
H01L029/76
H01L031/062

257/357000, 257/500000, 257/509000, 257/371000

The present disclosure relates that by modifying the masking layer normally utilized for complimentary type tub development to provide one or more additional openings arranged in close proximity to the drain area of a selected power device of the non-complimentary type, that the dopant profile may be modified to provide a greater voltage breakdown exclusively for that selected power device without affecting similar type logic circuit non-complimentary devices as found within the same integrated circuit chip. Furthermore, this is accomplished without the need for providing an additional mask or additional process steps to supplement and thereby disturb a given predefined process set for the fabrication of semiconductor devices.

2003008, May 15, 2003

May 23, 2002

10/154666

Shelby Nelson - Pittsford NY, US
Alan Raisanen - Sodus NY, US

Xerox Corporation

H01L021/332
H01L023/62
H01L029/76
H01L031/062

257/357000, 257/371000, 257/500000

The present disclosure relates that by modifying the masking layer normally utilized for complimentary type tub development to provide one or more additional openings arranged in close proximity to the drain area of a selected power device of the non-complimentary type, that the dopant profile may be modified to provide a greater voltage breakdown exclusively for that selected power device without affecting similar type logic circuit non-complimentary devices as found within the same integrated circuit chip. Furthermore, this is accomplished without the need for providing an additional mask or additional process steps to supplement and thereby disturb a given predefined process set for the fabrication of semiconductor devices.

6109733, Aug 29, 2000

Nov 21, 1997

8/976461

Alan D. Raisanen - Sodus NY
Cathie J. Burke - Rochester NY

Xerox Corporation - Stamford CT

B41J 205

347 63

The efficiency of a thermal ink jet printhead is improved by providing a thermally grown field oxide layer and a deposited oxide layer, the two combined layers providing thermal insulation between a resistor layer and a silicon substrate. In a preferred embodiment, zirconium diboride is sputtered in the presence of oxygen to form a thin field oxide layer on a field oxide layer grown on the surface of the silicon substrate. At a predetermined time, during the sputtering process, oxygen is removed and the sputtering continues to form a conductive ZrB. sub. 2 layer. The combined thickness of the two oxide layers provides the required thermal isolation between silicon substrate and heater resistor while the thermally grown field oxide layer enables the closer packing of resistor transistor drive circuits.