Anthony D Calcaterra, Age 562000 Walnut Ave UNIT Q102, Fremont, CA 94538

Anthony Calcaterra Phones & Addresses

1775 Milmont Dr, Milpitas, CA 95035

1775 Milmont Dr #R108, Milpitas, CA 95035

2141 63Rd St, Sacramento, CA 95822

Marion, IN

3071 Brett Loop, Eugene, OR 97404

Los Gatos, CA

Redwood City, CA

Pleasant Hill, CA

Phoenix, AZ

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Resumes

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Principal Member Technical Staff

Location:
Milpitas, CA
Industry:
Renewables & Environment
Work:
Solexel
Principal Member Technical Staff
Education:
Arizona State University 1991 - 1995
Doctorates, Doctor of Philosophy, Philosophy, Chemistry
Anthony Calcaterra Photo 20

Anthony Calcaterra

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Anthony Calcaterra

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Anthony Calcaterra

Location:
United States

Publications & IP owners

Us Patents

Method And Apparatus For Applying A Voltage To A Substrate During Plating

US Patent:
7758732, Jul 20, 2010
Filed:
Feb 13, 2009
Appl. No.:
12/371397
Inventors:
Anthony Calcaterra - Milpitas CA, US
David Knox - La Mirada CA, US
Assignee:
WD Media, Inc. - San Jose CA
International Classification:
C25D 17/00
US Classification:
204212, 204199
Abstract:
A method for applying a strike voltage to one or more substrates during plating. During this method, the substrates are moved in a planetary manner while being held at their exterior edges by a set of parallel mandrels. (The substrates are held in a mutually parallel orientation, typically vertically, during plating. ) A voltage is applied to the substrates via a contact pin, a contact plate, a set of ball bearings, a rack end-plate, and the mandrels.

Method And Apparatus For Making A Stamper For Patterning Cds And Dvds

US Patent:
2005015, Jul 14, 2005
Filed:
May 3, 2004
Appl. No.:
10/837859
Inventors:
Christopher Bajorek - Los Gatos CA, US
Anthony Calcaterra - Milpitas CA, US
International Classification:
B29D011/00
US Classification:
264001330, 264002500, 425175000, 425810000
Abstract:
A method for forming a stamper used in the manufacture of CDs, DVDs, and other types of optical disks comprises forming a substrate by rolling. A layer of material is deposited (e.g. by plating) onto the substrate. Thereafter, a resist layer is formed on the layer of material and patterned. Because the substrate is formed by rolling, it is relatively inexpensive to form the substrate to a desired thickness. Because the layer of material is formed by deposition (e.g. plating), it is relatively inexpensive to ensure that the layer has a very smooth surface (i.e. without necessitating a great deal of polishing).

Method And Apparatus For Making A Stamper For Patterning Cds And Dvds

US Patent:
2005016, Aug 4, 2005
Filed:
Mar 22, 2005
Appl. No.:
11/086154
Inventors:
Christopher Bajorek - Los Gatos CA, US
Anthony Calcaterra - Milpitas CA, US
International Classification:
B29D011/00
US Classification:
264001330, 264002500, 425810000, 425406000
Abstract:
A method for forming a stamper used in the manufacture of CDs, DVDs, and other types of optical disks comprises forming a substrate by rolling. A layer of material is deposited (e.g. by plating) onto the substrate. Thereafter, a resist layer is formed on the layer of material and patterned. Because the substrate is formed by rolling, it is relatively inexpensive to form the substrate to a desired thickness. Because the layer of material is formed by deposition (e.g. plating), it is relatively inexpensive to ensure that the layer has a very smooth surface (i.e. without necessitating a great deal of polishing).

Method And Apparatus For Plating Substrates

US Patent:
2005026, Dec 1, 2005
Filed:
Mar 23, 2005
Appl. No.:
11/088052
Inventors:
Gerald Olsen - San Jose CA, US
David Knox - La Mirada CA, US
Robert Tierney - Fremont CA, US
Anthony Calcaterra - Milpitas CA, US
International Classification:
C25D005/00
US Classification:
205143000, 204199000, 204200000
Abstract:
Plating apparatus comprises a gear mechanism for imparting planetary motion to a set of holders for holding substrates in a plating bath. The holders are typically a non-conductive material such as plastic. The holders are coupled to a bearing comprising first and second plastic races and metallic balls therebetween. This embodiment reduces the amount of plastic moving against plastic, and therefore reduces the amount of wear, friction, and generation of contaminant parts. The holders comprise a central mandrel and outer mandrels connected to end pieces. The substrates are held at their outer edges between the outer mandrels and the central mandrels.

Method And Apparatus For Applying A Voltage To A Substrate During Plating

US Patent:
2005027, Dec 15, 2005
Filed:
May 26, 2004
Appl. No.:
10/853953
Inventors:
Anthony Calcaterra - Milpitas CA, US
David Knox - La Mirada CA, US
International Classification:
C25D017/00
US Classification:
204212000, 204215000
Abstract:
A method for applying a strike voltage to one or more substrates during plating. During this method, the substrates are moved in a planetary manner while being held at their exterior edges by a set of parallel mandrels. (The substrates are held in a mutually parallel orientation, typically vertically, during plating.) A voltage is applied to the substrates via a contact pin, a contact plate, a set of ball bearings, a rack end-plate, and the mandrels.

Backplane Reinforcement And Interconnects For Solar Cells

US Patent:
2012010, May 3, 2012
Filed:
Aug 5, 2011
Appl. No.:
13/204626
Inventors:
Mehrdad M. Moslehi - Los Altos CA, US
David Xuan-Qi Wang - Fremont CA, US
Karl-Josef Kramer - San Jose CA, US
Sean M. Seutter - San Jose CA, US
Sam Tone Tor - Pleasanton CA, US
Anthony Calcaterra - Milpitas CA, US
Assignee:
SOLEXEL, INC. - Milpitas CA
International Classification:
H01L 31/0224
US Classification:
136256, 438 98, 257E31124
Abstract:
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.

High-Efficiency Photovoltaic Back-Contact Solar Cell Structures And Manufacturing Methods Using Thin Planar Semiconductor Absorbers

US Patent:
2012030, Dec 6, 2012
Filed:
Dec 9, 2010
Appl. No.:
13/057104
Inventors:
Mehrdad M. Moslehi - Los Altos CA, US
Pawan Kapur - Burlingame CA, US
Karl-Josef Kramer - San Jose CA, US
David Xuan-Qi Wang - Fremont CA, US
Sean M. Seutter - San Jose CA, US
Virenda V. Rana - Los Gatos CA, US
Anthony Calcaterra - Milpitas CA, US
Emmanuel Van Kerschaver - Los Altos CA, US
Assignee:
SOLEXEL, INC. - Milpitas CA
International Classification:
H01L 31/0224
H01L 31/18
US Classification:
136256, 438 98, 257E31124
Abstract:
Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.

Active Backplane For Thin Silicon Solar Cells

US Patent:
2013000, Jan 3, 2013
Filed:
Mar 28, 2012
Appl. No.:
13/433280
Inventors:
Mehrdad M. Moslehi - Los Altos CA, US
David Xuan-Qi Wang - Fremont CA, US
Karl-Josef Kramer - San Jose CA, US
Sean M. Seutter - San Jose CA, US
Sam Tone Tor - Pleasanton CA, US
Anthony Calcaterra - Milpitas CA, US
Assignee:
SOLEXEL, INC. - Milpitas CA
International Classification:
H01L 31/0224
H01L 31/18
US Classification:
136256, 438 98, 257E31124
Abstract:
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepeg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepeg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepeg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepeg backplane.

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