Brian C Seemann, Age 44Westminster, CO

6912698, Jun 28, 2005

May 23, 2002

10/155301

Brian T. Brunn - Austin TX, US
Brian K. Seemann - Lakeville MN, US

Xilinx, Inc. - San Jose CA

G06F017/50

716 2, 716 4, 716 11, 716 12, 716 13

Integrated circuits, key components in thousands of products, frequently include thousands and even millions of microscopic transistors and other electrical components. Because of difficulties and costs of fabricating these circuits, circuit designers sometimes ask fabricators to produce skew lots for testing and predicting manufacturing yield. However, conventional skew lots for CMOS circuits, which are based on increasing or decreasing transistor transconductance, are not very useful in testing certain types of analog circuits, such as oscillators. Accordingly, the present inventors developed a new type of skew lot, based on increasing or decreasing gate-to-source capacitance of transistors, or more generally a transistor characteristic other than transconductance. This new type of skew lot is particularly suitable for simulating, testing, and/or making yield predictions for oscillators and other CMOS analog circuits.

7784004, Aug 24, 2010

Apr 21, 2005

11/111135

Brian T. Brunn - Austin TX, US
Brian K. Seemann - Lakeville MN, US

Xilinx, Inc. - San Jose CA

G06F 17/50
G06F 9/455

716 11, 716 2, 716 4

Integrated circuits, key components in thousands of products, frequently include thousands and even millions of microscopic transistors and other electrical components. Because of difficulties and costs of fabricating these circuits, circuit designers sometimes ask fabricators to produce skew lots for testing and predicting manufacturing yield. However, conventional skew lots for CMOS circuits, which are based on increasing or decreasing transistor transconductance, are not very useful in testing certain types of analog circuits, such as oscillators. Accordingly, the present inventors developed a new type of skew lot, based on increasing or decreasing gate-to-source capacitance of transistors, or more generally a transistor characteristic other than transconductance. This new type of skew lot is particularly suitable for simulating, testing, and/or making yield predictions for oscillators and other CMOS analog circuits.