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Bryan Joseph Thome, Age 56916 35Th St, Galveston, TX 77550

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Known as:
Bryan J Thome Brian Joseph Thome Bryan J Thomas Dewey Meadows
Related to:
Abjit Thomas

Bryan Thome Phones & Addresses

916 35Th St, Galveston, TX 77550 (409) 974-4012

1304 Upland Park, Houston, TX 77043 (281) 208-8411

1351 Chardonnay Dr, Houston, TX 77077 (281) 556-8803 (713) 661-3935 (832) 243-6686

1511 Northshore Ct, Missouri City, TX 77459 (281) 208-8411

Angleton, TX

Carlisle, PA

Coppell, TX

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Bryan Joseph Thome

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Work

Company: World fuel services 2017 Position: Senior manager, applications development

Education

Degree: Bachelors, Bachelor of Science School / High School: University of Houston Specialities: Computer Engineering

Skills

Strategic Leadership • Strategic Planning • Team Leadership • Business Development • Organizational Design • Product Management • Forecasting • Budgeting • Process Improvement • Project Management • Software Project Management • Software Engineering • Software Development • Sdlc • Agile Methodologies • Requirements Analysis • Software Design • Quality Assurance • Testing • Systems Engineering • Engineering • Marketing • Research and Development • Scrum • Software As A Service • Embedded Systems • C# • Technical Leadership • Thought Leadership • Cross Functional Team Leadership • Leadership • Customer Engagement • Organizational Development • Staff Development • Team Building • Personnel Management • Negotiation • Creative Problem Solving • Collaborative Problem Solving • Team Management • Communication • Organizational Culture • Department Budgeting • Root Cause Problem Solving • Oil and Gas • Business Applications • Product Development • Program Management

Languages

English

Industries

Computer Software

Mentions for Bryan Joseph Thome

Bryan Thome resumes & CV records

Resumes

Bryan Thome Photo 13

Senior Manager, Applications Development

Location:
Houston, TX
Industry:
Computer Software
Work:
World Fuel Services
Senior Manager, Applications Development Geoscale 2015 - 2017
Director of Software Development Halliburton 2012 - 2015
Software Development Manager; Technical Consultant Texas Instruments 1999 - 2012
System Developer Sulzer Intermedics 1993 - 1999
Software Engineer
Education:
University of Houston
Bachelors, Bachelor of Science, Computer Engineering
Skills:
Strategic Leadership, Strategic Planning, Team Leadership, Business Development, Organizational Design, Product Management, Forecasting, Budgeting, Process Improvement, Project Management, Software Project Management, Software Engineering, Software Development, Sdlc, Agile Methodologies, Requirements Analysis, Software Design, Quality Assurance, Testing, Systems Engineering, Engineering, Marketing, Research and Development, Scrum, Software As A Service, Embedded Systems, C#, Technical Leadership, Thought Leadership, Cross Functional Team Leadership, Leadership, Customer Engagement, Organizational Development, Staff Development, Team Building, Personnel Management, Negotiation, Creative Problem Solving, Collaborative Problem Solving, Team Management, Communication, Organizational Culture, Department Budgeting, Root Cause Problem Solving, Oil and Gas, Business Applications, Product Development, Program Management
Languages:
English

Publications & IP owners

Us Patents

Implantable Device And Programmer System Which Permits Multiple Programmers

US Patent:
6512954, Jan 28, 2003
Filed:
Oct 16, 2001
Appl. No.:
09/981972
Inventors:
James K. Fox - Lake Jackson TX
William B. Rottenberg - Lake Jackson TX
Bryan J. Thome - Houston TX
Assignee:
Intermedics, Inc. - Angleton TX
International Classification:
A61N 1362
US Classification:
607 31, 607 59
Abstract:
A multiprogrammer system for monitoring and optimizing implantable device performance. In one embodiment, the system includes at least two programming devices and an implantable device. Each of the programming devices may be used to perform inquiry and programming operations on the implantable device. In an inquiry operation, the programming device retrieves some or all of the configuration parameters from the implantable device. In a programming operation, the programming device provides one or more modified parameters to the implantable device. As part of the programming operation, the programming device is configured to verify that it is aware of the implantable devices current parameters before sending the modified parameters. In other words, the current programming device verifies that the implantable devices parameters have not been altered by another programming device since the current programming devices last interaction with the implantable device. If the parameters have been altered, the current programming device aborts the programming operation and notifies the operator.

Little Offset In Multicycle Event Maintaining Cycle Accurate Tracing Of Stop Events

US Patent:
6948155, Sep 20, 2005
Filed:
Nov 22, 2002
Appl. No.:
10/301894
Inventors:
Manisha Agarwala - Richardson TX, US
Bryan Thome - Missouri City TX, US
Gary L. Swoboda - Sugarland TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F009/44
US Classification:
717128
Abstract:
A method of tracing activity of a data processor includes collecting and transmitting trace data. An epause marker is embedded in the trace stream upon detection of an emulation halt. This epause marker includes a little offset indicating a number of latency instructions within trace collection hardware since a program counter exception. This permits the utilization emulation device to annulling trace data corresponding to the latency instructions.

Tracing Program Counter Addresses Using Native Program Counter Format And Instruction Count Format

US Patent:
7047451, May 16, 2006
Filed:
Nov 22, 2002
Appl. No.:
10/302025
Inventors:
Manisha Agarwala - Richardson TX, US
Bryan Thome - Missouri City TX, US
John M. Johnsen - Dallas TX, US
Gary L. Swoboda - Sugarland TX, US
Lewis Nardini - Dallas TX, US
Maria B. H. Gill - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/00
US Classification:
714 45, 710 68
Abstract:
A method of tracing program counter activity in a data processor periodically transmits a program counter sync point including the current program counter address. Between sync points the program counter address is indicated by a program counter offset relative to the last program counter sync point. The program counter offset is sent as integral number of sections of a predetermined number of bits. Program counter sync points are transmitted often enough so that the program counter offset requires at most one less section than the program counter address.

Apparatus And Method For Trace Stream Identification Of A Pipeline Flattener Primary Code Flush Following Initiation Of An Interrupt Service Routine

US Patent:
7210072, Apr 24, 2007
Filed:
Dec 5, 2003
Appl. No.:
10/729327
Inventors:
Gary L. Swoboda - Sugar Land TX, US
Bryan Thome - Missouri City TX, US
Manisha Agarwala - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/00
US Classification:
714 45, 714 30, 717128, 712227
Abstract:
When a PROGRAM CODE FLUSH signal is generated in a target processor during a test procedure, a sync marker is generated in a program counter trace stream. The sync marker includes a plurality of packets, the packets identifying that the sync marker is has been generated as a result of the PROGRAM CODE FLUSH signal. The program code flush sync marker identifies the absolute program counter address at the time of the generation of the PROGRAM CODE FLUSH signal and relates the PROGRAM CODE FLUSH signal sync marker to a timing trace stream. The PROGRAM CODE FLUSH signal is generated at the transition between the program (primary) code instructions being removed from the pipeline flattener and the interrupt service routine (secondary) code instructions being removed from the pipeline flattener.

Apparatus And Method For Identification Of A New Secondary Code Start Point Following A Return From A Secondary Code Execution

US Patent:
7225365, May 29, 2007
Filed:
Dec 5, 2003
Appl. No.:
10/729326
Inventors:
Gary L. Swoboda - Sugar Land TX, US
Bryan Thome - Missouri City TX, US
Manisha Agarwala - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/00
US Classification:
714 45, 714 30, 712227, 717128
Abstract:
When a NEW SECONDARY CODE EXECUTION START POINT signal is generated in a target processor during a test procedure after the return from an interrupt service routine (i. e. , an original secondary code sequence), a sync marker is generated in a program counter trace stream. The sync marker includes a plurality of packets, the packets identifying that the sync marker is has been generated as a result of the NEW SECONDARY CODE EXECUTION START POINT signal. The new secondary program code start point sync marker identifies the absolute program counter address at the time of the generation of the NEW SECONDARY CODE EXECUTION START POINT signal and relates the NEW SECONDARY CODE EXECUTION START POINT signal sync marker to a timing trace stream.

Apparatus And Method For Trace Stream Identification Of A Processor Reset

US Patent:
7237151, Jun 26, 2007
Filed:
Dec 5, 2003
Appl. No.:
10/729639
Inventors:
Gary L. Swoboda - Sugar Land TX, US
Bryan Thome - Missouri City TX, US
Manisha Agarwala - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/30
G06F 11/34
US Classification:
714 45, 714 34, 717128
Abstract:
When a RESET signal is generated in a target processor during a test procedure, a reset sync marker is generated in a program counter trace stream. The reset sync marker includes a plurality of packets, the packets identifying that the reset sync marker is the result of a RESET signal. The packets identify the program counter address at the time of the generation of the RESET signal and relate the reset sync marker to a timing trace stream. When the RESET signal is removed, a second (reset-off) sync marker is generated identifying the removal of the RESET signal, identifying the program counter address, and relating the second sync marker to the timing trance stream.

Apparatus And Method For Trace Stream Identification Of A Processor Debug Halt Signal

US Patent:
7310749, Dec 18, 2007
Filed:
Dec 5, 2003
Appl. No.:
10/729214
Inventors:
Gary L. Swoboda - Sugar Land TX, US
Bryan Thome - Missouri City TX, US
Lewis Nardini - Dallas TX, US
Manisha Agarwala - Richardson TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/00
US Classification:
714 45, 714 30, 714 34, 717124
Abstract:
When a DEBUG HALT signal is generated in a target processor during a test procedure, a debug halt sync marker is generated in a program counter trace stream. The debug halt sync marker includes a plurality of packets, the packets identifying that the sync marker is the result of a DEBUG HALT signal. The packets also identify the program counter address at the time of the generation of the DEBUG HALT signal and relate the debug halt sync marker to a timing trace stream.

Tracing Program Counter Addresses Using Native Program Counter Format And Instruction Count Format

US Patent:
7318176, Jan 8, 2008
Filed:
May 15, 2006
Appl. No.:
11/383337
Inventors:
Manisha Agarwala - Richardson TX, US
Bryan Thome - Missouri City TX, US
John M. Johnsen - Dallas TX, US
Gary L. Swoboda - Sugarland TX, US
Lewis Nardini - Dallas TX, US
Maria B. H. Gill - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/00
US Classification:
714 45, 717128
Abstract:
A method of tracing program counter activity in a data processor periodically transmits a program counter sync point including the current program counter address. Between sync points the program counter address is indicated by a program counter offset relative to the last program counter sync point. The program counter offset is sent as integral number of sections of a predetermined number of bits. Program counter sync points are transmitted often enough so that the program counter offset requires at most one less section than the program counter address.

Possible Relatives

Daniel A Thome  Daryl J Thome  Eric J Thome  Greg J Thome  John Thome  Joshua A Thome  Kelly S Thome  Bryan L Johnson  Bryan D Stamps  Bryan S Stanford 

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