Christopher P Leon, Age 4428348 Roadside Dr UNIT 202C, Agoura Hills, CA 91301

8140040, Mar 20, 2012

Sep 11, 2009

12/558388

Christopher R. Leon - Irvine CA, US

Qualcomm Atheros, Inc - San Jose CA

H04B 1/06
H04K 3/00

455260, 327156, 375376

An integrated circuit including a Phase Locked Loop (PLL) configured for use with a continuous stream receiver is disclosed. A control voltage line is configured to deliver a control voltage with a capacitive load delivered by a capacitor array to the control voltage based upon an add signal and a subtract signal. A threshold generator generates a high threshold voltage and a low threshold voltage using and including at least one process dependent resistor and at least two temperature and process dependent current sources. The PLL responds during calibration to the control voltage being above the high threshold voltage by asserting the add signal directing the capacitor array to increase the capacitive load on the control voltage line, and to the control voltage being below the low threshold voltage by asserting the subtract signal to decrease the capacitive load.

8203393, Jun 19, 2012

Nov 17, 2008

12/272149

Christopher R. Leon - Irvine CA, US

QUALCOMM Atheros, Inc. - San Jose CA

H03K 3/354

331176, 331 66, 331 57

A voltage controlled oscillator having a temperature and process controlled output. A VCO in accordance with the present invention comprises a reference current source, a fixed current source, coupled in series with the reference current source, the fixed current source comprising a temperature independent current source, a third current source, coupled in parallel with the combination of the reference current source and the fixed current source, and an oscillator, coupled in series with the third current source, wherein a current used to control the oscillator is based on operating temperatures and processes of the reference current source and the third current source.

8350600, Jan 8, 2013

Nov 10, 2005

11/271121

Christopher R. Leon - Irvine CA, US

QUALCOMM Incorporated - San Diego CA

G06F 1/08

327 99, 327298

A glitchless clock multiplexer controlled by an asynchronous select signal for use in GPS receivers is disclosed. A device in accordance with the present invention comprises a device for producing a clock signal, the clock signal being selected from a plurality of asynchronous frequency sources. A device in accordance with the present invention comprises a first frequency source, a second frequency source, a select signal, wherein the select signal is asynchronous with the first frequency source, and a multiplexer, which receives the first frequency source and the second frequency source, wherein the multiplexer selects as an output of the multiplexer one of the first frequency source and the second frequency source based on a value of the select signal, such that when the multiplexer switches between the first frequency source and the second frequency source, and between the second frequency source and the first frequency source, the transition is performed when the output of the multiplexer is at a logic low.

8521115, Aug 27, 2013

Feb 9, 2012

13/369998

Christopher R. Leon - Irvine CA, US

QUALCOMM Incorporated - San Diego CA

H04B 1/06
H04K 3/00

455260, 327156, 375376

An integrated circuit including a Phase Locked Loop (PLL) configured for use with a continuous stream receiver is disclosed. A control voltage line is configured to deliver a control voltage with a capacitive load delivered by a capacitor array to the control voltage based upon an add signal and a subtract signal. A threshold generator generates a high threshold voltage and a low threshold voltage using and including at least one process dependent resistor and at least two temperature and process dependent current sources. The PLL responds during calibration to the control voltage being above the high threshold voltage by asserting the add signal directing the capacitor array to increase the capacitive load on the control voltage line, and to the control voltage being below the low threshold voltage by asserting the subtract signal to decrease the capacitive load.

2006010, May 18, 2006

Nov 10, 2005

11/271023

Christopher Leon - Irvine CA, US

H04L 27/22

375332000

A quadrature voltage controlled oscillator that generates both in-phase and quadrature signals. The in-phase signal is generated by directly coupling two oscillators, while the quadrature phase signal is generated by cross-coupling the two oscillators.

2006011, Jun 1, 2006

Nov 10, 2005

11/271343

Christopher Leon - Irvine CA, US

G01S 5/14

342357060

A method and apparatus to eliminate PLL lock-up during power-up for a VCO. A method in accordance with the present invention comprises coupling a divider to a Voltage Controlled Oscillator (VCO) to create the feedback loop, and driving the divider with a signal, wherein the signal from the VCO is at high frequency upon power up.

6798263, Sep 28, 2004

Nov 25, 2002

10/304310

Christopher R. Leon - Irvine CA

Applied Micro Circuits Corporation - San Diego CA

H03K 3289

327203, 327217, 327218

A differential latch circuit with a differential reset function includes a first arrangement of transistors configured to perform a latch function and a second arrangement of transistors, connected to the first arrangement of transistors, configured to perform a reset function. The first arrangement of transistors includes branches having three cascoded transistors, and the second arrangement of transistors includes branches having two cascoded transistors. This configuration enables the latch circuit to use lower power supply voltages relative to conventional latch circuits that require four more cascoded transistors.