David T Welland, Age 5219803 15Th Ave E, Spanaway, WA 98387

6456712, Sep 24, 2002

Mar 4, 1998

09/034453

Jerrell P. Hein - Driftwood TX
Jeffrey W. Scott - Austin TX
Navdeep S. Sooch - Austin TX
David R. Welland - Austin TX

Silicon Laboratories Inc. - Austin TX

H04M 100

37939901, 379373, 379377, 379398, 379405, 379412, 379379, 375257, 375219, 375222, 375 36, 375121, 375220

A communication system of the present invention utilizes ring detection circuitry on both sides of an isolation barrier. More particularly, the ring detection circuitry may include ring burst circuitry on the phone line side of the isolation barrier and ringer timing circuits on the powered side of the isolation barrier. The digital burst peak signal may be transmitted through the isolation barrier to the ringer timing circuits. By splitting the ring detection circuitry so that the ringer timing circuits are placed on the powered side of the isolation barriers, a significant reduction in the power usage on the phone line side of the barrier related to the ring detection function may occur. The outputs of the ringing timing circuits may be provided to circuits on either side of the isolation barrier. Thus, the ring detection function may be accomplished in a system utilizing an efficient bidirectional capacitive barrier while still minimizing power usage on the line side of the barrier.

6104794, Aug 15, 2000

Mar 4, 1998

9/034460

Jerrell P. Hein - Driftwood TX
Andrew W. Krone - Austin TX
Jeffrey W. Scott - Austin TX
Navdeep S. Sooch - Austin TX
David R. Welland - Austin TX

Silicon Laboratories, Inc. - Austin TX

H04M 100
H04M 900
H04M 908
H04M 156
H04M 1506

379142

A communication system is provided which draws virtually no loop current during a ringing burst and only draws on-hook loop current during the caller ID field. More particularly, ringer burst circuitry may be powered from the user powered circuitry by the transmission of power across the isolation barrier rather than being powered from the phone line. Thus, loop current need not be drawn from the TIP/RING lines during ringer bursts. The isolation barrier may be a capacitive isolation barrier which allows bidirectional communication and extraction of power from signals transmitted across the barrier.

6038116, Mar 14, 2000

May 8, 1998

9/075449

Douglas R. Holberg - Wimberley TX
Nadi R. Itani - Austin TX
David R. Welland - Austin TX

Cirrus Logic, Inc. - Fremont CA

H02H 900

361 56

A high voltage input pad and method for accepting electrostatic discharge (ESD) surges without damage to an input semiconductor amplifier. The protection system includes a metal gate transistor, and n-well resistors which provide ESD protection. Protection is further provided against large voltages coupled to an amplifier by connecting an input bipolar junction transistor to the negative input connection of the amplifier. Negative surges are directed to ground with an anode grounded diode connected at its cathode to the negative input connection of the amplifier.

6307891, Oct 23, 2001

Mar 4, 1998

9/034684

Jerrell P. Hein - Driftwood TX
Timothy J. Dupuis - Austin TX
George Tyson Tuttle - Austin TX
Jeffrey W. Scott - Austin TX
Navdeep S. Sooch - Austin TX
David R. Welland - Austin TX

Silicon Laboratories, Inc. - Austin TX

H04B 1500

375285

A method and apparatus are provided for suspending or freezing outputs from an isolation barrier system, which may be a digital capacitive isolation barrier system, during the occurrence of events that may disrupt proper operation of the system. Examples of such disruptive events are data rate changes during modem baud rate negotiations, transition to low-power mode, and going off-hook in a telephony system. In each of these cases, the master circuit anticipates the disruption and sends a freeze signal to the isolated circuit. The freeze signal instructs the isolated circuit to enter freeze mode, and no data is sent through the isolation system. Internal control signals are generated and used to establish synchronization and framing after the disruption, and to restore normal operation of the isolation system. In preferred embodiments, the duration of the freeze period may be determined by a timer or by circuitry that detects framing lock or the presence of transients in the system. This invention prevents the transmission of erroneous control signals or corrupted data through the isolation system when it experiences a disruptive event.

6298133, Oct 2, 2001

Mar 4, 1998

9/034802

Jerrell P. Hein - Driftwood TX
Jeffrey W. Scott - Austin TX
Navdeep S. Sooch - Austin TX
David R. Welland - Austin TX

Silicon Laboratories, Inc. - Austin TX

H04M 1738
H04M 1900

379399

A capacitive interface may be utilized to provide a linear output from the TIP and RING phone lines to ringer circuitry. Because the interface provides a linear signal, the input provided to the ringer circuitry may also be utilized for other functions in addition to ringer detection functions. More particularly, the outputs of the capacitive interface may also be connected to caller ID circuitry input lines so as to also provide caller ID data. The use of common inputs for the ringer circuitry and the caller ID circuitry eliminates the need for a separate caller ID interface.

6285536, Sep 4, 2001

Nov 3, 1999

9/433812

Douglas R. Holberg - Wimberley TX
Nadi R. Itani - Austin TX
David R. Welland - Austin TX

Cirrus Logic, Inc. - Austin TX

H02H 900

361 56

A high voltage input pad and method for accepting electrostatic discharge (ESD) surges without damage to an input semiconductor amplifier. The protection system includes a metal gate, transistor, and n-well resistors which provide ESD protection. Protection is further provided against large voltages coupled to an amplifier by connecting an input bipolar junction transistor to the negative input connection of the amplifier. Negative surges are directed to ground with an anode grounded diode connected at its cathode to the negative input connection of the amplifier.

6198816, Mar 6, 2001

Mar 4, 1998

9/034428

Jerrell P. Hein - Driftwood TX
Jeffrey W. Scott - Austin TX
Navdeep S. Sooch - Austin TX
David R. Welland - Austin TX

Silicon Laboratories, Inc. - Austin TX

H04M 1738
H04M 1900

379373

A communication system is provided with a capacitive isolation barrier in which at least a portion of the ring detection circuits may be integrated into the line side circuitry. Moreover the ring detection circuits on the phone line side of the isolation barrier may be powered at least in part by power transmitted from the powered side of the isolation barrier to the phone line side of the isolation barrier through the barrier capacitors. A capacitive interface may directly connect the ringer circuitry on the phone line side of the barrier to the TIP/RING lines. The capacitive interface operates to linearly attenuate the TIP/RING signal voltage levels from the high phone line levels to levels within integrated circuit technology limitations.