Dennis W Rose, Age 76Nashville, CA

5901189, May 4, 1999

Jul 24, 1996

8/686143

Dennis M. Rose - Sunnyvale CA

National Semiconductor Corporation - Santa Clara CA

H04L 700

375368

A symmetrical correlator includes a shift register into which the bit pattern resulting from oversampling a received data signal are clocked using a sample clock. During each cycle of the sample clock, a first number of the bits contained in the shift register are provided to an enable circuit. The enable circuit compares these bits to a predetermined bit pattern and, in response to the correlation therebetween, generates an enabling signal. Also during each cycle of the sample clock, a plurality of bit pairs symmetrical about a predetermined bit position in the shift register are compared for logical equivalency in a plurality of associated logical equivalency circuits. Each of the logic equivalency circuits provides a signal indicative of the logic equivalency of its associated bit pair to an adder. When enabled, the adder sums the binary values provided thereto by the logical equivalency circuits to generate a signal SUM indicative of the degree of symmetry of the bit pattern contained in the shift register about the predetermined bit position for that clock cycle. A peak value for the signal SUM indicates the center of the bit interval of the data signal is precisely associated with the predetermined bit position of the shift register.

5764108, Jun 9, 1998

Oct 9, 1996

8/731084

Dennis Rose - Sunnyvale CA
Christian V. Olgaard - Sunnyvale CA
Steve Lo - Menlo Park CA

National Semiconductor Corporation - Santa Clara CA

H03K 2138
H03L 7183

331 17

An apparatus for reducing the power consumed by, and the noise generated at the output of a charge pump which is part of a phase locked loop circuit. A reduction in the power consumed by the charge pump is achieved by synchronizing the powering up of the charge pump bias circuit to the state of the counters which control the timing of the signal which triggers a charge pump cycle. In this way current is supplied to the charge pump circuit only when needed for the operation of the pump. A reduction in the noise present at the output of the charge pump caused by the reloading of the counters while the pump is activated is achieved by loading a portion of the counter bits prior to activating the pump. A circuit detects when the counter is close to a value of zero and produces a signal which loads the most significant bits of the counter. When the counter reaches a value of zero, the remaining bits are loaded.

5379242, Jan 3, 1995

Sep 1, 1993

8/115491

Dennis M. Rose - Sunnyvale CA
Daniel E. Fague - Sunnyvale CA

National Semiconductor Corporation - Santa Clara CA

G06F 1531

36472401

A ROM filter includes a number of ROMs, each of which is programmed to hold data relating to several pulse response curves during only a particular time interval. As data are read into the filter, data pertaining to a particular pulse response curve are addressed in each of the ROMs. The outputs of the ROMs are connected to an adder, which adds the data read from the ROMs and passes it through a digital-to-analog converter. In this arrangement, the ROMs are required to store only the data relating to the pulse response curves during a particular interval. These data are added together in real time in an adder which is external to the ROM. With this structure the area of the ROM can be significantly reduced, as compared with ROM filters in which the addition is programmed into the ROM.