Dylan Jacob Kelly, Age 47105 N Glen Abbey Cir, Graford, TX 76449

Dylan Kelly Phones & Addresses

Graford, TX

556 Tarento Dr, San Diego, CA 92106 (619) 665-2439

2677 Piantino Cir, San Diego, CA 92108

11934 Loomis Dr, Austin, TX 78738 (512) 263-3603

Keller, TX

Work

Company: Peregrine semiconductor corp Address: 9380 Carroll Park Dr, San Diego, CA 92121 Phones: (858) 731-9400 Position: Director mobile markets Industries: Semiconductors and Related Devices

Mentions for Dylan Jacob Kelly

Dylan Kelly resumes & CV records

Resumes

Dylan Kelly Photo 35

Vice President And General Manager, Mobile Wireless Solutions At Peregrine Semiconductor

Position:
Vice President and General Manager, Mobile Wireless Solutions at Peregrine Semiconductor
Location:
Greater San Diego Area
Industry:
Semiconductors
Work:
Peregrine Semiconductor since Feb 2010
Vice President and General Manager, Mobile Wireless Solutions
Peregrine Semiconductor Dec 2008 - Feb 2010
Director, Sales and Marketing, Mobile Wireless Products
Peregrine Semiconductor Mar 2008 - Feb 2010
Director, Mobile Markets
Peregrine Semiconductor May 2005 - Jan 2008
Design Manager, Switch Products
Peregrine Semiconductor May 2003 - May 2005
Staff Engineer, RFIC Design
Peregrine Semiconductor May 2002 - May 2003
Senior Engineer, RFIC Design
Peregrine Semiconductor May 2001 - May 2002
Project Engineer, RFIC Design
Peregrine Semiconductor Jun 2000 - May 2001
Engineer, RFIC Design
Motorola Jan 1999 - Jun 2000
Engineer, RFIC Design
Education:
University of California, San Diego 2000 - 2005
MSEE, Circuits and Systems
The University of Texas at Austin 1995 - 2000
BSEE, Circuits and Systems

Publications & IP owners

Us Patents

Switch Circuit And Method Of Switching Radio Frequency Signals

US Patent:
7613442, Nov 3, 2009
Filed:
May 11, 2005
Appl. No.:
11/127520
Inventors:
Dylan J. Kelly - San Diego CA, US
Mark L. Burgener - San Diego CA, US
James S. Cable - Del Mar CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H04B 1/28
H01L 29/76
H04Q 7/20
H04M 1/00
US Classification:
455333, 455425, 4555501, 257341, 323220, 323234, 323271, 323274
Abstract:
A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The RF switch provides improvements in insertion loss, switch isolation, and switch compression. An improved voltage reducing circuit is described.

Unpowered Switch And Bleeder Circuit

US Patent:
7619462, Nov 17, 2009
Filed:
Feb 9, 2006
Appl. No.:
11/351342
Inventors:
Dylan J. Kelly - San Diego CA, US
Clint L. Kemerling - Escondido CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H03K 17/687
US Classification:
327427, 327431, 455323, 455330
Abstract:
A novel RF switch for switching radio frequency (RF) signals is disclosed. The RF switch may comprise both enhancement and depletion mode field-effect transistors (E-FETs and D-FETs) implemented as a monolithic integrated circuit (IC) on a silicon-on-insulator (SOI) substrate. The disclosed RF switch, with a novel bleeder circuit, may be used in RF applications wherein a selected switch state and performance are required when the switch and bleeder circuits are not provided with operating power (i. e. , when the switch and bleeder circuits are “unpowered”).

Low Noise Charge Pump Method And Apparatus

US Patent:
7719343, May 18, 2010
Filed:
Sep 8, 2003
Appl. No.:
10/658154
Inventors:
Mark L. Burgener - San Diego CA, US
Dylan Kelly - San Diego CA, US
James S. Cable - San Diego CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H02M 3/18
G05F 3/16
H03B 5/00
US Classification:
327536, 327537, 363 60
Abstract:
A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.

Symmetrically And Asymmetrically Stacked Transistor Group Rf Switch

US Patent:
7796969, Sep 14, 2010
Filed:
Feb 3, 2006
Appl. No.:
11/347014
Inventors:
Dylan J. Kelly - San Diego CA, US
Mark L. Burgener - San Diego CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H04B 1/24
H01L 29/76
H04Q 7/20
H04M 1/00
US Classification:
455333, 455425, 4555501, 257341
Abstract:
A silicon-on-insulator (SOI) RF switch adapted for improved power handling capability using a reduced number of transistors is described. In one embodiment, an RF switch includes pairs of switching and shunting stacked transistor groupings to selectively couple RF signals between a plurality of input/output nodes and a common RF node. The switching and shunting stacked transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. In one embodiment, the transistor groupings are “symmetrically” stacked in the RF switch (i. e. , the transistor groupings all comprise an identical number of transistors). In another embodiment, the transistor groupings are “asymmetrically” stacked in the RF switch (i. e. , at least one transistor grouping comprises a number of transistors that is unequal to the number of transistors comprising at least one other transistor grouping). The stacked configuration of the transistor groupings enable the RF switch to withstand RF signals of varying and increased power levels.

Method And Apparatus Improving Gate Oxide Reliability By Controlling Accumulated Charge

US Patent:
7890891, Feb 15, 2011
Filed:
Sep 14, 2006
Appl. No.:
11/520912
Inventors:
Michael A. Stuber - Carlsbad CA, US
Christopher N. Brindle - Poway CA, US
Dylan J. Kelly - San Diego CA, US
Clint L. Kemerling - Escondido CA, US
George P. Imthurn - San Diego CA, US
Robert B. Welstand - San Diego CA, US
Mark L. Burgener - San Diego CA, US
Alexander Dribinsky - Naperville IL, US
Tae Youn Kim - San Diego CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
G06F 17/50
US Classification:
716 1, 716 2
Abstract:
A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET.

Method And Apparatus For Use In Improving Linearity Of Mosfet's Using An Accumulated Charge Sink

US Patent:
7910993, Mar 22, 2011
Filed:
Jul 10, 2006
Appl. No.:
11/484370
Inventors:
Christopher N. Brindle - Poway CA, US
Michael A. Stuber - Carlsbad CA, US
Dylan J. Kelly - San Diego CA, US
Clint L. Kemerling - Escondido CA, US
George P. Imthurn - San Diego CA, US
Robert B. Welstand - San Diego CA, US
Mark L. Burgener - San Diego CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H01L 27/12
US Classification:
257347
Abstract:
A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Canceling Harmonics In Semiconductor Rf Switches

US Patent:
8081928, Dec 20, 2011
Filed:
Feb 3, 2006
Appl. No.:
11/347671
Inventors:
Dylan J. Kelly - San Diego CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H04B 1/00
US Classification:
455 631, 455 6713, 333101, 333103
Abstract:
An RF switching circuit adapted to cancel selected harmonic signals. An unwanted harmonic signal Sh at a selected harmonic frequency Fsh of an operating frequency Fo exists in a signal Si conducted by the switching circuit, possibly produced by the switching circuit due to conduction through a first nonlinear impedance Znl(). A compensating harmonic signal Sh is therefore generated by conduction via a nonlinear impedance Znl(). Znl() may be due to parasitic conduction by “off” switching elements, while Znl() may be due to conduction by an “on” FET. The amplitude and/or phasing of Sh may be adjusted by selecting components for a network coupling Znl() to the conducted signal Si, such that Sh substantially cancels Sh across a target range of input power.

Method And Apparatus For Use In Improving Linearity Of Mosfets Using An Accumulated Charge Sink

US Patent:
8129787, Mar 6, 2012
Filed:
Mar 22, 2011
Appl. No.:
13/053211
Inventors:
Christopher N. Brindle - Poway CA, US
Michael A. Stuber - Carlsbad CA, US
Dylan J. Kelly - San Diego CA, US
Clint L. Kemerling - Escondido CA, US
George P. Imthurn - San Diego CA, US
Robert B. Welstand - San Diego CA, US
Mark L. Burgener - San Diego CA, US
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H01L 27/12
US Classification:
257347
Abstract:
A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

NOTICE: You may not use PeopleBackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. PeopleBackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.