Eugene L Shoykhet, Age 442238 Weston Dr, San Jose, CA 95130

Eugene Shoykhet Phones & Addresses

2238 Weston Dr, San Jose, CA 95130 (913) 568-6318

Aptos, CA

15717 S Lindenwood Dr, Olathe, KS 66062

Harvest, AL

Rolla, MO

Saint Louis, MO

Social networks

Eugene L Shoykhet

Linkedin

Work

Company: Microsoft Mar 2013 to Feb 2018 Position: Senior director of hardware engineering for hololens at microsoft

Education

Degree: Master of Business Administration, Masters School / High School: University of Kansas - Graduate School of Business 2004 to 2008 Specialities: Finance

Skills

Logic Analyzer • Embedded Systems • Debugging • Hardware Architecture • Analog • Firmware

Languages

Russian • English

Industries

Consumer Electronics

Mentions for Eugene L Shoykhet

Eugene Shoykhet resumes & CV records

Resumes

Eugene Shoykhet Photo 10

Director Of Platform Architecture

Location:
2238 Weston Dr, San Jose, CA 95130
Industry:
Consumer Electronics
Work:
Microsoft Mar 2013 - Feb 2018
Senior Director of Hardware Engineering For Hololens at Microsoft
Google Mar 2013 - Feb 2018
Director of Platform Architecture
Apple Feb 2011 - Mar 2013
Iphone Hardware Engineering Manager
Garmin International Dec 2007 - Feb 2011
Portable Navigation Devices Design Team Leader
Garmin International Jan 2003 - Dec 2007
Hardware Design Engineer
Stoecker and Associates Jun 1999 - Dec 2002
Staff Research Software Engineer
Adtran Jun 2002 - Aug 2002
Hardware Engineering Design Intern
Adtran Jun 2001 - Aug 2001
Software Engineering Intern
Anheuser-Busch Inbev Jan 2000 - Aug 2000
Software Engineering Intern
Education:
University of Kansas - Graduate School of Business 2004 - 2008
Master of Business Administration, Masters, Finance
Missouri University of Science and Technology 1998 - 2003
Bachelors, Bachelor of Science In Electrical Engineering, Electrical Engineering
Ladue Horton Watkins High School 1994 - 1998
Skills:
Logic Analyzer, Embedded Systems, Debugging, Hardware Architecture, Analog, Firmware
Languages:
Russian
English

Publications & IP owners

Us Patents

System And Method For Selecting A Frequency For Personal-Use Fm Transmission

US Patent:
2008005, Mar 6, 2008
Filed:
Jan 24, 2007
Appl. No.:
11/626686
Inventors:
Eugene L. Shoykhet - Olathe KS, US
Jason D. Bridges - Lenexa KS, US
Assignee:
Garmin Ltd. - George Town
International Classification:
H04B 1/18
H04Q 7/20
US Classification:
4551611, 455434, 455515
Abstract:
A portable electronic device includes a radio frequency receiver; a radio frequency transmitter; and a processing system coupled with the receiver and transmitter. The processing system directs the receiver to scan a radio frequency spectrum for available radio channels over which the transmitter may transmit. The processing system may further direct the receiver to perform a second scan for radio channels which are actively transmitting information. The processing system then selects an available radio channel as the radio channel best suited for use by the transmitter to transmit information to the external audio system. The processing system may select a transmission frequency which is spectrally distant from the active radio channels and/or may take into account a transmission profile of the transmitter to select a frequency that does not interfere with the reception of incoming radio signals.

Force Sensor Interface For Touch Controller

US Patent:
2013007, Mar 28, 2013
Filed:
Sep 23, 2011
Appl. No.:
13/243925
Inventors:
Christoph Horst KRAH - Los Altos CA, US
Eugene Lvovich Shoykhet - Cupertino CA, US
Martin Paul Grunthaner - Mountain View CA, US
International Classification:
G06F 3/041
US Classification:
345173
Abstract:
A force sensor interface in a touch controller of a touch sensitive device is disclosed. The force sensor interface can couple to touch circuitry to integrate one or more force sensors with touch sensors of the device. The force sensor interface can include one portion to transmit stimulation signals generated by the touch circuitry to the force sensors to drive the sensors. The interface can also include another portion to receive force signals, indicative of a force applied to the device, from the force sensors for processing by the touch circuitry. The device can use the touch circuitry to concurrently and seamlessly operate both the force sensors and the touch sensors.

Electronic Device Power Protection Circuitry

US Patent:
2013033, Dec 19, 2013
Filed:
Sep 27, 2012
Appl. No.:
13/629276
Inventors:
Yehonatan Perez - Menlo Park CA, US
Stephen J. Hrinya - San Jose CA, US
Eugene L. Shoykhet - San Jose CA, US
Assignee:
Apple Inc. - Cupertino CA
International Classification:
G05F 3/02
H02H 7/20
US Classification:
323315, 361 84
Abstract:
A host electronic device may be coupled to an accessory electronic device. During normal operation, the host device may supply the accessory device with power over a power supply line. Back-powering events in which the accessory device delivers power to the host device may be prevented by interposing a protection transistor in the power supply line. A current mirror may be formed using the protection transistor and an additional transistor that produces a sense current proportional to the amount of current that is flowing through the power supply line. A current-to-voltage amplifier may produce a sense voltage that is proportional to the sense current. A bias circuit may be used to bias the sense current through the current mirror. A control circuit may compare the sense voltage to one or more reference voltages and turn off the protection transistor when appropriate to prevent back-powering of the host device.

Automatic Dc Resistance Compensation

US Patent:
2018021, Aug 2, 2018
Filed:
Jan 27, 2017
Appl. No.:
15/417532
Inventors:
- Redmond WA, US
David Paul Wunsch Desrosiers - Los Gatos CA, US
Eugene Lvovich Shoykhet - San Jose CA, US
David Simon Lukofsky - San Francisco, CA
Agustya Ruchir Mehta - Mountain View CA, US
Junius Mark Penny - Ben Lomond CA, US
International Classification:
H02J 7/00
G01R 19/10
G01R 19/165
G01R 31/36
G06F 1/26
Abstract:
The uneven charge and discharge from non-collocated batteries within an HMD can be solved by monitoring the DC current on the paths coupled to the first battery and the second battery and making an adjustment in the path resistance to equalize, or at least reduce, the difference between the currents on the two paths. Aspects of the technology described herein monitor current on paths from two or more non-collocated batteries. When the currents are different, resistance is dynamically added to the path with the higher current to equalize the current in the two paths. The monitoring and resistance adjustment can occur during discharge from a battery to a load and during battery recharge.

Enablement Of Device Power-On With Proper Assembly

US Patent:
2017031, Nov 2, 2017
Filed:
May 2, 2016
Appl. No.:
15/144088
Inventors:
Junius Penny - Ben Lomond CA, US
Agustya Mehta - Mountain View CA, US
David Lukofsky - San Francisco CA, US
Eugene Shoykhet - San Jose CA, US
International Classification:
H02H 11/00
G02B 27/01
H02J 7/00
G02B 27/01
Abstract:
An electronic device is configured with sub-assemblies including a main logic board, flexible printed circuit, and dual battery packs that are assembled together with electrical connectors to enable power from the battery packs to flow over a power bus that is distributed along the flexible printed circuit and main logic board. A protection circuit module (PCM) in each battery pack is configured to determine a state of each of the connections among the sub-assemblies (i.e., whether or not properly assembled to provide electrical continuity through the connector) so that power from the battery packs is switched on to the power bus only when electrical continuity is verified at each of the connectors. In the event that any connection is faulty, for example due to a misalignment of a connector during assembly that prevents electrical continuity to be established through a connector, neither PCM will switch power on to the power bus.

Enhanced Parallel Protection Circuit

US Patent:
2017030, Oct 19, 2017
Filed:
Apr 13, 2016
Appl. No.:
15/097872
Inventors:
Julian Binder - Sunnyvale CA, US
Daniel Chian - Los Altos CA, US
Eugene Shoykhet - San Jose CA, US
Ruchi Parikh - Sunnyvale CA, US
International Classification:
H02H 3/10
H02H 7/18
H02H 5/04
Abstract:
An enhanced parallel protection circuit is provided. A system using separate battery packs in a parallel configuration is arranged with multiple protection circuit modules (PCMs). The PCMs are configured to detect fault conditions, such as over voltage, under voltage, excess current, etc. The PCMs can be configured to control associated switches and/or other components. When a fault condition is detected by an individual PCM, the individual PCM transitions to a fault state, and the PCM triggers an output causing one or more actions, e.g., causing a device to shut down or isolate one or more components. In addition, by the use of the techniques disclosed herein, the individual PCM can generate a control signal that causes other PCMs to transition to a fault state. The individual PCM can also receive a control signal from another PCM to cause the individual PCM to transition to a fault state.

Electronic Device Power Protection Circuitry

US Patent:
2016032, Nov 3, 2016
Filed:
Apr 29, 2016
Appl. No.:
15/143321
Inventors:
- Cupertino CA, US
Yehonatan Perez - Menlo Park CA, US
Stephen J. Hrinya - San Jose CA, US
Eugene L. Shoykhet - San Jose CA, US
International Classification:
G05F 3/02
H02H 9/02
H04W 88/02
Abstract:
A host electronic device may be coupled to an accessory electronic device. During normal operation, the host device may supply the accessory device with power over a power supply line. Back-powering events in which the accessory device delivers power to the host device may be prevented by interposing a protection transistor in the power supply line. A current mirror may be formed using the protection transistor and an additional transistor that produces a sense current proportional to the amount of current that is flowing through the power supply line. A current-to-voltage amplifier may produce a sense voltage that is proportional to the sense current. A bias circuit may be used to bias the sense current through the current mirror. A control circuit may compare the sense voltage to one or more reference voltages and turn off the protection transistor when appropriate to prevent back-powering of the host device.

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