Evelyn Tingmay Yeung, Age 531105 Terra St, Round Rock, TX 78664

Evelyn Yeung Phones & Addresses

1105 Terra St, Round Rock, TX 78664 (512) 733-0224

Canyon Lake, TX

10522 Glenwolde Dr, Houston, TX 77099 (281) 719-5168

12113 Metric Blvd, Austin, TX 78758 (512) 719-5168

11901 Hobby Horse Ct, Austin, TX 78758 (512) 719-5168

11901 Hobby Horse Ct #1421, Austin, TX 78758 (512) 719-5168

College Sta, TX

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Evelyn Tingmay Yeung

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Work

Position: Professional/Technical

Education

Degree: Associate degree or higher

Skills

Aix • Shell Scripting • Business Analysis • Storage Area Networks • San • Storage • Linux • Unix • Servers • Testing • C • Virtualization • Scsi • Debugging • Fibre Channel • Software Development • Cisco Technologies • Device Drivers • Ksh • Perl • Solaris • Scripting • Unix Shell Scripting • High Availability • Operating Systems • Bash • Tcp/Ip • System Architecture • Cluster

Industries

Computer Software

Mentions for Evelyn Tingmay Yeung

Evelyn Yeung resumes & CV records

Resumes

Evelyn Yeung Photo 22

Evelyn Yeung

Location:
1105 Terra St, Round Rock, TX 78665
Industry:
Computer Software
Skills:
Aix, Shell Scripting, Business Analysis, Storage Area Networks, San, Storage, Linux, Unix, Servers, Testing, C, Virtualization, Scsi, Debugging, Fibre Channel, Software Development, Cisco Technologies, Device Drivers, Ksh, Perl, Solaris, Scripting, Unix Shell Scripting, High Availability, Operating Systems, Bash, Tcp/Ip, System Architecture, Cluster

Publications & IP owners

Us Patents

Method To Coordinate Data Collection Among Multiple System Components

US Patent:
2012013, May 31, 2012
Filed:
Nov 30, 2010
Appl. No.:
12/957033
Inventors:
Vishal Chittranjan Aslot - Austin TX, US
Brian W. Hart - Austin TX, US
Anil Kalavakolanu - Austin TX, US
Evelyn Tingmay Yeung - Round Rock TX, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 17/30
US Classification:
707737, 707769, 707E17061, 707E17089
Abstract:
A method, computer program product and computer system for coordinating data collection from a component of a data processing system is disclosed. The component registers with a dispatcher, wherein the component is a computer resource of the data processing system and is configured to accept at least one query, and the registration comprising data types handled by the at least one component, wherein the dispatcher is allocated computer resources of the data processing system. The component receives from the dispatcher a notification to perform the query against specified data structures, wherein the query comprises an action. The component, responsive to receiving notification, determines whether data structures of a data type specified in the query are handled. The data processing system runs the query to determine whether the query is satisfied. The data processing system executes the action.

Fast Cancellation Of Input-Output Requests

US Patent:
2012031, Dec 6, 2012
Filed:
Jun 6, 2011
Appl. No.:
13/154335
Inventors:
VISHAL CHITTARANJAN ASLOT - Austin TX, US
BRIAN W. HART - Austin TX, US
ANIL KALAVAKOLANU - Austin TX, US
EVELYN TINGMAY YEUNG - Austin TX, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 5/14
US Classification:
710 55
Abstract:
A method, system, and computer program product for fast cancellation of an I/O request in a data processing system are provided in the illustrative embodiments. A first component in a stack comprising a plurality of components determines whether a memory buffer associated with the I/O request is valid, the memory buffer being an addressable area in a memory in the data processing system. The first component, responsive to the memory buffer being valid, creates a first request data structure corresponding to the I/O request, wherein the first request data structure includes a reference to the memory buffer. The first component passes the first request data structure to a second component in the stack.

Capturing Multi-Component Trace For Unit For Work

US Patent:
2013005, Feb 28, 2013
Filed:
Aug 25, 2011
Appl. No.:
13/217413
Inventors:
Vishal Chittranjan Aslot - Austin TX, US
Brian W. Hart - Austin TX, US
Anil Kalavakolanu - Austin TX, US
Evelyn Tingmay Yeung - Round Rock TX, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/44
US Classification:
717128
Abstract:
Provided are techniques for the tracing of computer processes and, more specifically, to techniques that enable a work unit to be traced across multiple processing components. A data structure is created and associated with a work unit. The first time a unit of work is processed a tracing context is retrieved form a pool and associated with the data structure. As the unit of work is passed from component to component, the data structure is passed so that each component has access and is able to augment the same tracing context associated with the unit of work.

Resource Management In A Virtualized Environment

US Patent:
2013006, Mar 14, 2013
Filed:
Sep 14, 2011
Appl. No.:
13/232211
Inventors:
Vishal C. Aslot - Austin TX, US
Brian W. Hart - Austin TX, US
Anil Kalavakolanu - Austin TX, US
Evelyn T. Yeung - Round Rock TX, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/455
US Classification:
718 1
Abstract:
In a method for managing resources in a virtualized computing environment, a command to initiate execution of an operating system image dump process for a logical partition of the virtualized computing environment is received while the logical partition is in a process of terminating. One or more resources that are allocated to the logical partition that will not be utilized by the logical partition during execution of the operating system image dump process are determined. A notification to a hypervisor program in the virtualized computing environment is sent. The notification identifies the one or more resources. One of the one or more resources is reallocated. The operating system image dump process is executed.

Method And Technique To Find Timing Window Problems

US Patent:
2021008, Mar 25, 2021
Filed:
Sep 24, 2019
Appl. No.:
16/580687
Inventors:
- Armonk NY, US
Douglas Griffith - Burnet TX, US
Emmanuelle Samir Hanna Matta - Cairo, EG
Evelyn Tingmay Yeung - Round Rock TX, US
Srinivasa Rao Muppala - Round Rock TX, US
International Classification:
G06F 11/36
G06F 11/28
G06F 9/48
Abstract:
Threads of a multithreaded application may be scheduled to different cores and executed in various orders and at various frequencies. Controlling how the threads are scheduled and clock rates of processor cores enables testing multiple possible execution scenarios, which may force previously unknown timing window problems to occur. These timing window problems may then be detected.

Reducing Redundant Validations For Live Operating System Migration

US Patent:
2017002, Jan 26, 2017
Filed:
Sep 22, 2015
Appl. No.:
14/860765
Inventors:
- Armonk NY, US
Brian W. Hart - Austin TX, US
Anil Kalavakolanu - Austin TX, US
Minh Q. Pham - Austin TX, US
Teresa H. Pham - Cedar Park TX, US
Evelyn T. Yeung - Round Rock TX, US
International Classification:
G06F 9/455
Abstract:
A method, system, and program product is provided for reducing redundant validations for live operating system migration. A control point caches at least one validation inventory that is associated with a logical partition (LPAR). The control point sends the cached validation inventory to a virtualization manager upon an activation of the LPAR associated with the validation inventory. The control point invalidates the cached validation inventory upon notification from the virtualization manager that the validation inventory is changed and is no longer valid. The control point re-validates the validation inventory.

Reducing Redundant Validations For Live Operating System Migration

US Patent:
2017002, Jan 26, 2017
Filed:
Jul 24, 2015
Appl. No.:
14/808645
Inventors:
- Armonk NY, US
Brian W. Hart - Austin TX, US
Anil Kalavakolanu - Austin TX, US
Minh Q. Pham - Austin TX, US
Teresa H. Pham - Cedar Park TX, US
Evelyn T. Yeung - Round Rock TX, US
International Classification:
G06F 9/50
G06F 9/455
Abstract:
A method, system, and program product is provided for reducing redundant validations for live operating system migration. A control point caches at least one validation inventory that is associated with a logical partition (LPAR). The control point sends the cached validation inventory to a virtualization manager upon an activation of the LPAR associated with the validation inventory. The control point invalidates the cached validation inventory upon notification from the virtualization manager that the validation inventory is changed and is no longer valid. The control point re-validates the validation inventory.

Function Transfer Using Virtualized Mapping

US Patent:
2015005, Feb 19, 2015
Filed:
Aug 19, 2013
Appl. No.:
13/969664
Inventors:
- Armonk NY, US
Liang Jiang - Austin TX, US
Anil Kalavakolanu - Austin TX, US
Shannon D. Moore - Pflugerville TX, US
Robert E. Wallis - Austin TX, US
Evelyn T. Yeung - Round Rock TX, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 13/16
G06F 13/28
US Classification:
710308, 710313
Abstract:
The present disclosure includes a method for migration of a first virtual function of a first device located on a PCI bus and accessible by a device driver using a virtual address. A second virtual function is created on a second device. A base address is determined for the second virtual function as a function of a logical location of the second device within the PCI structure. An offset is determined for the second virtual function as a function of the base address and the virtual address. The device driver is notified that the first virtual function is on hold. The offset is stored in a translation table. The device driver is notified that the hold has been lifted. Accesses to the virtual address and by the device driver to memory of the second virtual function are routed based upon the offset in the translation table.

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