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Frank T Guo, Age 742486 Diablo Ranch Pl, Danville, CA 94506

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Known as:
Matthew Hoffman
Related to:
Tzen-Wen Guo 68

Frank Guo Phones & Addresses

2486 Diablo Ranch Pl, Danville, CA 94506 (925) 784-9252

Dewitt, MI

2486 Diablo Ranch Pl, Danville, CA 94506 (925) 683-9400

Work

Company: Blackrock Jan 2010 Position: User research lead

Education

School / High School: University of California 2005 Specialities: PhD in Cognitive Psychology

Skills

Setting up and managing user research Developing UX research methods Developing UX design guidelines Performing 360-degree user research and analysis in shaping business strategy Defining UI architecture Providing usability solutions for complex interaction designs Industry specialties: iPhone and iPad apps • social collaboration solutions • social media • digital marketing • eCommerce • financial services • enterprise software Technical skills: Axure • Visio • statistical analysis • eyetracking • wireframing

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Resumes & CV records

Resumes

Frank Guo Photo 39

Frank Guo

Frank Guo Photo 40

Frank T Guo

Location:
2486 Diablo Ranch Pl, Danville, CA 94506
Industry:
Semiconductors
Work:
Kilopass Technology, Inc. Dec 2015 - Dec 2017
Principle Engineer Qualcomm Jun 2013 - Nov 2015
Principal Engineer Arm Feb 2006 - May 2013
Principle Engineer Nantero Sep 2003 - Feb 2006
Principle Engineer T-Ram Jul 2002 - Sep 2003
Principal Engineer Hal Computer Systems Apr 2000 - May 2001
Memory Design Manager Rise Technolgy Jul 1995 - Apr 2000
Senior Manager In Charge of Circuit Design Team Various Companies Jun 1984 - Jun 1995
Design Engineer
Education:
National Chiao Tung University 1974 - 1980
Masters, Bachelors, Master of Science In Electrical Engineering, Bachelor of Science The University of Texas at Austin
Masters, Master of Science In Electrical Engineering, Materials Science
Skills:
Sram, Circuit Design, Ic, Compilers, Memory Design, Memory Test, Low Power Design, Debugging, Cmos
Interests:
Boating
Kids
Exercise
Investing
Gardening
Outdoors
Sweepstakes
Home Improvement
Electronics
Reading
Sports
Automobiles
Travel
Home Decoration
Languages:
English
Frank Guo Photo 41

Frank Guo

Position:
Founder and Principal at UX Strategized LLC
Location:
San Francisco Bay Area
Industry:
Internet
Work:
UX Strategized LLC - San Francisco Bay Area since Jan 2012
Founder and Principal BlackRock Jan 2010 - Feb 2012
User Research Lead Barclays Global Investors Sep 2008 - Dec 2009
Manager, Web Research eBay Inc. Apr 2006 - Aug 2008
Sr. User Researcher Oracle Corp. Jul 2004 - Mar 2006
Web Market Researcher UCLA Jan 2000 - Jun 2004
Teaching Fellow
Skills:
Usability, User Experience, Consumer Insights, Web market research, Information Architecture, Mobile, Eye Tracking, Mobile Devices, Market Research, Digital Strategy, Human Computer Interaction, Product Management, Persona, Strategy, Usability Testing, Program Management, Interaction Design, User Interface, Design Strategy, Online Advertising, Start-ups, Customer Insight, User-centered Design, E-commerce, User Research
Awards:
Best Paper Award
Human Computer Interaction International conference
Received a best-paper award based on peer review at the Human Computer Interaction International conference for a web-marketing UX paper that I co-authored.
Frank Guo Photo 42

Frank Guo

Frank Guo Photo 43

Frank Guo

Frank Guo Photo 44

Frank Guo

Frank Guo Photo 45

Frank Guo - San Francisco, CA

Work:
BlackRock Jan 2010 to Present
User Research Lead Barclays - San Francisco, CA Sep 2008 to Dec 2009
Manager, User Research eBay Inc Mar 2006 to Aug 2008
Sr. User Researcher Oracle Corporation Jul 2004 to Mar 2006
Market Researcher UCLA, Department of Psychology Sep 1999 to Jun 2004
Researcher of Consumer Psychology
Education:
University of California 2005
PhD in Cognitive Psychology UCLA 2001
MA in Cognitive Psychology University of Minnesota 1997 to 1999
PhD in Sociology Shenzhen University 1996
BA in Chinese Literature
Skills:
Setting up and managing user research Developing UX research methods Developing UX design guidelines Performing 360-degree user research and analysis in shaping business strategy Defining UI architecture Providing usability solutions for complex interaction designs Industry specialties: iPhone and iPad apps, social collaboration solutions, social media, digital marketing, eCommerce, financial services, enterprise software Technical skills: Axure, Visio, statistical analysis, eyetracking, wireframing

Publications & IP owners

Us Patents

Field Effect Devices Having A Source Controlled Via A Nanotube Switching Element

US Patent:
6982903, Jan 3, 2006
Filed:
Jun 9, 2004
Appl. No.:
10/864045
Inventors:
Claude L. Bertin - South Burlington VT, US
Thomas Rueckes - Boston MA, US
Brent M. Segal - Woburn MA, US
Frank Guo - Danville CA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
G11C 11/00
US Classification:
365163, 365129, 365177
Abstract:
Field effect devices having a source controlled via a nanotube switching element. Under one embodiment, a field effect device includes a source region and a drain region of a first semiconductor type and a channel region disposed therebetween of a second semiconductor type. The drain region is connected to a corresponding terminal. A gate structure is disposed over the channel region and connected to a corresponding terminal. A nanotube switching element is responsive to a first control terminal and a second control terminal and is electrically positioned in series between the source region and a terminal corresponding to the source region. The nanotube switching element is electromechanically operable to one of an open and closed state to thereby open or close an electrical communication path between the source region and its corresponding terminal. When the nanotube switching element is in the closed state, the channel conductivity and operation of the device is responsive to electrical stimulus at the terminals corresponding to the source and drain regions and the gate structure.

Circuit Arrays Having Cells With Combinations Of Transistors And Nanotube Switching Elements

US Patent:
7301802, Nov 27, 2007
Filed:
Jun 9, 2004
Appl. No.:
10/864681
Inventors:
Claude L. Bertin - South Burlington VT, US
Thomas Rueckes - Boston MA, US
Brent M. Segal - Woburn MA, US
Frank Guo - Danville CA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
G11C 11/50
G11C 11/52
US Classification:
365164, 365166, 977943
Abstract:
Circuit arrays having cells with combinations of transistors and nanotube switches. Under one embodiment, a circuit array includes a plurality of cells arranged in an organization of words, each word having a plurality of bits. Each cell is responsive to a bit line, word line, reference line, and release line. Bit lines are arranged orthogonally relative to word lines and each word line and bit line are shared among a plurality of cells. Each cell is selectable via the activation of the bit line and word line. Each cell includes a field effect transistor coupled to a nanotube switching element. The nanotube switching element is switchable to at least two physical positions at least in part in response to electrical stimulation via the reference line and release line. Information state of the cell is non-volatilely stored via the respective physical position of the nanotube switching element. Under another embodiment, a circuit array includes a plurality of cells arranged in an organization of words, each word having a plurality of bits.

Non-Volatile-Shadow Latch Using A Nanotube Switch

US Patent:
7394687, Jul 1, 2008
Filed:
Nov 15, 2005
Appl. No.:
11/280599
Inventors:
Claude L. Bertin - South Burlington VT, US
Frank Guo - Danville CA, US
Thomas Ruckes - Rockport MA, US
Steven L. Konsek - Boston MA, US
Mitchell Meinhold - Arlington MA, US
Max Strasburg - Gresham OR, US
Ramesh Sivarajan - Medford MA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
G11C 11/34
US Classification:
36518508, 365151, 365164, 977943
Abstract:
A non-volatile memory cell includes a volatile storage device that stores a corresponding logic state in response to electrical stimulus; and a shadow memory device coupled to the volatile storage device. The shadow memory device receives and stores the corresponding logic state in response to electrical stimulus. The shadow memory device includes a non-volatile nanotube switch that stores the corresponding state of the shadow device.

Memory Arrays Using Nanotube Articles With Reprogrammable Resistance

US Patent:
7479654, Jan 20, 2009
Filed:
Nov 15, 2005
Appl. No.:
11/274967
Inventors:
Claude L. Bertin - South Burlington VT, US
Frank Guo - Danville CA, US
Thomas Rueckes - Rockport MA, US
Steven L. Konsek - Boston MA, US
Mitchell Meinhold - Arlington MA, US
Max Strasburg - Gresham OR, US
Ramesh Sivarajan - Shrewsbury MA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
H01L 29/08
H01L 35/24
US Classification:
257 40, 257E5104, 257130, 365163, 365129, 365177
Abstract:
A memory array includes a plurality of memory cells, each of which receives a bit line, a first word line, and a second word line. Each memory cell includes a cell selection circuit, which allows the memory cell to be selected. Each memory cell also includes a two-terminal switching device, which includes first and second conductive terminals in electrical communication with a nanotube article. The memory array also includes a memory operation circuit, which is operably coupled to the bit line, the first word line, and the second word line of each cell. The circuit can select the cell by activating an appropriate line, and can apply appropriate electrical stimuli to an appropriate line to reprogrammably change the relative resistance of the nanotube article between the first and second terminals. The relative resistance corresponds to an informational state of the memory cell.

Hybrid Carbon Nanotude Fet(Cnfet)-Fet Static Ram (Sram) And Method Of Making Same

US Patent:
7598544, Oct 6, 2009
Filed:
Jan 13, 2006
Appl. No.:
11/332080
Inventors:
Claude L. Bertin - South Burlington VT, US
Mitchell Meinhold - Arlington MA, US
Steven L. Konsek - Boston MA, US
Thomas Rueckes - Rockport MA, US
Frank Guo - Danville CA, US
Assignee:
Nanotero, Inc. - Woburn MA
International Classification:
H01L 27/11
H01L 21/8244
US Classification:
257213, 257288, 257618, 257903, 257E27098, 257E21661, 365 4911, 365154, 365156, 365174, 365181, 365182, 438142, 438197, 438478
Abstract:
Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain or source of the first semiconductor-type FET and the second NTFET connected to the drain or source of the second semiconductor-type FET.

Circuit Arrays Having Cells With Combinations Of Transistors And Nanotube Switching Elements

US Patent:
7649769, Jan 19, 2010
Filed:
Nov 27, 2007
Appl. No.:
11/945710
Inventors:
Claude L. Bertin - Burlington VT, US
Thomas Rueckes - Rockport MA, US
Brent M. Segal - Woburn MA, US
Frank Guo - Danville CA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
G11C 11/50
G11C 11/52
US Classification:
365164, 365154, 365166, 977943, 977940, 977708, 257E27004
Abstract:
Circuit arrays having cells with combinations of transistors and nanotube switches. Under one embodiment, cells are arranged as pairs with the nanotube switching elements of the pair being cross coupled so that the set electrode of one nanotube switching element is coupled to the release electrode of the other and the release electrode of the one nanotube switching element being coupled to the set electrode of the other. The nanotube articles are coupled to the reference line, and the source of one field effect transistor of a pair is coupled to the set electrode to one of the two nanotube switching elements and the source of the other field effect transistor of the pair is coupled to the release electrode to the one of the two nanotube switching elements.

Two-Terminal Nanotube Devices And Systems And Methods Of Making Same

US Patent:
7781862, Aug 24, 2010
Filed:
Nov 15, 2005
Appl. No.:
11/280786
Inventors:
Claude L. Bertin - South Burlington VT, US
Mitchell Meinhold - Arlington MA, US
Steven L. Konsek - Boston MA, US
Thomas Ruckes - Rockport MA, US
Max Strasburg - Gresham OR, US
Frank Guo - Danville CA, US
Ramesh Sivarajan - Medford MA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
G11C 11/56
G11C 5/00
H01L 29/00
US Classification:
257529, 257530, 257209, 257E23147, 257E23149, 385148, 385151, 977943
Abstract:
A two terminal switching device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes a stimulus circuit in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device.

Hybrid Carbon Nanotube Fet (Cnfet)-Fet Static Ram (Sram) And Method Of Making Same

US Patent:
7855403, Dec 21, 2010
Filed:
Sep 29, 2009
Appl. No.:
12/569460
Inventors:
Claude L. Bertin - Venice FL, US
Mitchell Meinhold - Arlington MA, US
Steven L. Konsek - Boston MA, US
Thomas Rueckes - Rockport MA, US
Frank Guo - Danville CA, US
Assignee:
Nantero, Inc. - Woburn MA
International Classification:
H01L 29/76
US Classification:
257213, 257288, 257E27098, 257E21661, 257 24, 438197, 977762, 977938
Abstract:
Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain or source of the first semiconductor-type FET and the second NTFET connected to the drain or source of the second semiconductor-type FET.

Possible Relatives

Donglin Guo  Elena Guo  Fangfang Guo  Fei Guo  Guang J Guo  Gui X Guo  Frank R Johnson  Frank J Stanco  Frank W Johnston 

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