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Gary I Paek, Age 5014041 NW Lakeview Dr, Portland, OR 97229

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Known as:
Gary I Park
Related to:
Young Ae Kim 53 Hyungjin Kim 55

Gary Paek Phones & Addresses

14041 NW Lakeview Dr, Portland, OR 97229 (503) 466-7338

5 167Th Ave, Beaverton, OR 97006 (503) 439-0000 (503) 439-6937 (503) 530-8650

873 Oak St, Hillsboro, OR 97123

42043 Oak Way, Banks, OR 97106 (503) 324-6026

42039 Atwater Ct, Banks, OR 97106 (503) 324-4223

Corvallis, OR

14041 NW Lakeview Dr, Portland, OR 97229 (503) 530-8650

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Mentions for Gary I Paek

Resumes & CV records

Resumes

Gary Paek Photo 8

Director, Worldwide Data Center Enterprise Sales

Location:
Portland, OR
Industry:
Semiconductors
Work:
Intel Corporation
Director, Worldwide Data Center Enterprise Sales Enabling Intel Corporation
Director, Data Center Group Americas Sales Enabling Intel Corporation
Hpc Marketing Manager Intel Corporation
Worldwide Hpc Channel Marketing Manager
Director, Worldwide Data Center Enterprise Sales
Skills:
Soc, Ic, Semiconductor Industry, Semiconductors, Product Marketing, Technical Marketing, Multi Channel Marketing, Intel, Asic, Go To Market Strategy, Processors, Analog, Eda, Microprocessors, Mixed Signal, Program Management, Embedded Systems, Product Management, Strategic Partnerships, Cross Functional Team Leadership
Gary Paek Photo 9

Gary Paek

Location:
Portland, Oregon Area
Industry:
Computer Hardware

Publications & IP owners

Us Patents

Pcb Method And Apparatus For Producing Landless Interconnects

US Patent:
7084354, Aug 1, 2006
Filed:
Jun 14, 2002
Appl. No.:
10/173329
Inventors:
David W. Boggs - Hillsboro OR, US
Daryl A. Sato - Beaverton OR, US
John H. Dungan - Hillsboro OR, US
Gary I. Paek - Banks OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05K 1/11
H05K 1/14
US Classification:
174262, 174260, 29830, 361803
Abstract:
An electronic assembly is disclosed. The electronic assembly includes a lower portion and a first elongate trace formed on an upper surface of the lower portion. The trace is covered by an upper portion, and an opening formed through an upper surface of the upper portion extends to the trace to expose a portion of the trace. A second elongate trace is formed on the upper portion. A portion of the second elongate trace positioned in the opening formed through the upper surface of the upper portion contacts the first elongate trace through the opening to form an electrical interconnection between the first trace and the second trace.

Electronic Computer With Partially Transparent Input Device

US Patent:
D691995, Oct 22, 2013
Filed:
May 31, 2012
Appl. No.:
29/423470
Inventors:
Peter Adamson - Portland OR, US
Gary Paek - Beaverton OR, US
Nicholas Oakley - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
1402
US Classification:
D14318

Electronic Computer With Partially Transparent Input Device

US Patent:
D694232, Nov 26, 2013
Filed:
May 31, 2012
Appl. No.:
29/423475
Inventors:
Peter Adamson - Portland OR, US
Gary Paek - Beaverton OR, US
Nicholas Oakley - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
1402
US Classification:
D14318

Electronic Computer With An At Least Partially Transparent Input Device

US Patent:
D698350, Jan 28, 2014
Filed:
May 31, 2012
Appl. No.:
29/423471
Inventors:
Peter Adamson - Portland OR, US
Gary Paek - Beaverton OR, US
Nicholas Oakley - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
1402
US Classification:
D14318

Electronic Computer With An At Least Partially Transparent Input Device

US Patent:
D698778, Feb 4, 2014
Filed:
May 31, 2012
Appl. No.:
29/423472
Inventors:
Peter Adamson - Portland OR, US
Gary Paek - Beaverton OR, US
Nicholas Oakley - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
1402
US Classification:
D14318

Electronic Substrate With Direct Inner Layer Component Interconnection

US Patent:
2004021, Nov 4, 2004
Filed:
Dec 31, 2003
Appl. No.:
10/750560
Inventors:
David Boggs - Hillsboro OR, US
Daryl Sato - Portland OR, US
John Dungan - Hillsboro OR, US
Gary Paek - Beaverton OR, US
International Classification:
B32B003/00
US Classification:
428/209000
Abstract:
An electronic substrate for interconnecting electronic components comprises a substrate having one or more conductive inner layers and one or more interconnect cavities extending into the substrate to expose one or more of the inner layers.

Pcb Design And Method For Providing Vented Blind Vias

US Patent:
2004023, Nov 25, 2004
Filed:
Jun 17, 2004
Appl. No.:
10/870506
Inventors:
David Boggs - Hillsboro OR, US
John Dungan - Hillsboro OR, US
Gary Paek - Banks OR, US
Daryl Sato - Portalnd OR, US
International Classification:
H05K001/11
US Classification:
174/262000
Abstract:
An apparatus and method for providing a vented blind via in pad of a printed circuit board (PCB). A vent in the blind via in pad to allow gases formed during reflow soldering to escape from the solder joint. In one embodiment, the vent extends from the outer edge of the pad to the blind via. In another embodiment, a method includes forming a blind via in pad having a vent.

Dual Touch Surface Multiple Function Input Device

US Patent:
2013032, Dec 5, 2013
Filed:
May 31, 2012
Appl. No.:
13/485633
Inventors:
Peter S. Adamson - Portland OR, US
Gary Paek - Beaverton OR, US
Nicholas W. Oakley - Portland OR, US
John J. Valavi - Beaverton OR, US
International Classification:
G06F 3/041
US Classification:
345173
Abstract:
For one disclosed embodiment, an apparatus includes a first housing and a touch input device supported by the first housing. The touch input device includes a first touch surface layer, a second touch surface layer, and a touch sensor disposed between the first touch surface layer and the second touch surface layer. The touch sensor is configured to detect a first touch input associated with the first touch surface layer and a second touch input associated with the second touch surface layer.

Public records

Vehicle Records

Gary Paek

Address:
14041 NW Lakeview Dr, Portland, OR 97229
Phone:
(503) 352-5754
VIN:
5TDBY5G11CS072422
Make:
TOYOTA
Model:
SEQUOIA
Year:
2012

Possible Relatives

Daniel Paek  James C Paek  Kyung S Paek  Gary W Stamps  Gary S Standley  Gary L Stanfill  Gary S Joiner  Gary T Jolly  Gary A Jones  Gary J Stanko 

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