Inventors:
Albert Wang - Moraga CA
Scott Baron - Menlo Park CA
Prasad Padmanabhan - San Francisco CA
Gerald M. Cox - Lafayette CA
Assignee:
Matrix Integrated Systems, Inc. - Richmond CA
International Classification:
B01J 1500
US Classification:
216 55, 34404, 34406, 205209, 432 24, 432121
Abstract:
A method is disclosed for speeding workpiece thoughput in low pressure, high temperature semiconductor processing reactor. The method includes loading a workpiece into a chamber at atmospheric pressure, bringing the chamber down to an intermediate pressure, and heating the wafer while under the intermediate pressure. The chamber is then pumped down to the operating pressure. The preferred embodiments involve single wafer plasma ashers, where a wafer is loaded onto lift pins at a position above a wafer chuck, the pressure is rapidly pumped down to about 40 Torr by rapidly opening and closing an isolation valve, and the wafer is simultaneously lowered to the heated chuck. Alternatively, the wafer can be pre-processed to remove an implanted photoresist crust at a first temperature and the chamber then backfilled to about 40 Torr for further heating to close to the chuck temperature. At 40 Torr, the heat transfer from the chuck to the wafer is relatively fast, but still slow enough to avoid thermal shock. In the interim, the pump line is further pumped down to operating pressure (about 1 Torr) behind the isolation valve.