Gregory C Desalvo, Age 641105 Megg Ct, Magnolia, MD 21085

6653214, Nov 25, 2003

Jan 3, 2002

10/034747

Tony K. Quach - Lebanon OH
G. David Via - Beavercreek OH
James S. Sewell - Kettering OH
Christopher A. Bozada - Beavercreek OH
Gregory C. DeSalvo - Bellbrook OH
Ross W. Dettmer - Dayton OH
John L. Ebel - Beavercreek OH
James K. Gillespie - Cedarville OH
Thomas Jenkins - Fairborn OH
Kenichi Nakano - Beavercreek OH

The United States of America as represented by the Secretary of the Air Force - Washington DC

H01L 2144

438597, 438128, 438598, 438618, 438637

An integrated circuit substrate via-hole fabrication arrangement providing for accurate determination of via-hole size and via-hole registration through use of a calibrated pattern formed into the integrated circuit substrate during portions of the normal circuit fabrication process. Initiation of the via-hole and fabrication of the calibrated pattern from one surface, such as the front side, of the integrated circuit wafer and completion of the via-hole from the opposite surface of the wafer are contemplated. The calibrated pattern may be one of several possible physical configurations and of selected dimensions usable with the process, materials and circuitry of the device being fabricated. Use of the invention in fabricating ground conductor-connected via conductors for gigahertz radio frequency-capable integrated circuits of the monolithic or mixed hybrid with monolithic type and having a ground plane element is contemplated.

6657525, Dec 2, 2003

May 31, 2002

10/157935

Lawrence E. Dickens - Baltimore MD
Fred E. Sacks - Reisterstown MD
Howard Fudem - Baltimore MD
Don E. Crockett - Columbia MD
Frank Lindberg - Baltimore MD
Robert Young - Ellicott City MD
Gregory DeSalvo - Bellbrook OH

Northrop Grumman Corporation - Los Angeles CA

H01H 5122

335 78, 361233, 200181

A MEMS switch having spaced-apart RF conductors on a substrate with a bridge structure disposed above the substrate. In one embodiment the bridge structure has two flexible arms supported by two support members and in another embodiment the bridge structure has three flexible arms supported by three support members, the third support member being electrically integral with the second conductor. The bridge structure is drawn down to effect electrical contact between the first and second conductors by application of a control signal to a control electrode, having an opposed electrode on the undersurface of the bridge structure. A central stiffener portion of the bridge prevents any contact between the control and opposed electrodes.

6884717, Apr 26, 2005

Jan 3, 2002

10/034723

Gregory C. Desalvo - Bellbrook OH, US
Tony K. Quach - Lebanon OH, US
John L. Ebel - Beavercreek OH, US
Anders P. Walker - Wilmington OH, US
Paul D. Cassity - Covington OH, US

The United States of America as represented by the Secretary of the Air Force - Washington DC

H01L021/44

438667, 438460, 438464

An etching based semiconductor wafer thinning arrangement usable as an improved alternative to the usual grinding and polishing wafer thinning. The thinned wafer includes a structurally enhancing wafer backside grid array of original wafer thickness semiconductor material with grid cells surrounding individual thinned wafer areas and serving to improve the strength and physical rigidity characteristics of the thinned wafer. Preferably this grid array is supplemented with an additional, wafer periphery-located, backside ring of semiconductor material also of original wafer thickness. Ability to avoid a wafer front side mounting during thinning accomplishment, fast etching, reduced wafer breakage, enhanced wafer strength and improved wafer handling achieved with the disclosed thinning arrangement all contribute to achieved advantages over conventional wafer thinning. Gallium arsenide or other semiconductor materials are contemplated along with use in radio frequency or other integrated circuit devices of either the single transistor or complete integrated circuit components types.

2006013, Jun 29, 2006

Dec 27, 2004

11/020270

Christopher Kirby - Gambrills MD, US
Robert Horner - Severn MD, US
Harlan Cramer - Columbia MD, US
Robert Howell - Silver Spring MD, US
Robert Tranchini - Ellicott City MD, US
Gregory DeSalvo - Joppa MD, US
Gilbert Dix - Annapolis MD, US
Jeremiah Horner - Glen Burnie MD, US

NORTHROP GRUMMAN CORPORATION - Los Angles CA

H01L 23/58

257640000

An improved dielectric suitable for use in electronic and micro-electromechanical (MEMS) components. The dielectric includes silicon nitride having a percentage of Si:H bonds greater than a percentage of N:H bonds, in order to reduce the level of charge trapping of the silicon nitride.

2007012, May 31, 2007

Jul 12, 2006

11/484597

John Talvacchio - Ellicott City MD, US
James Murduck - Ellicott City MD, US
Gregory DeSalvo - Joppa MD, US
Rowland Clarke - Sykesville MD, US
Abigail Kirschenbaum - Baltimore MD, US
Deborah Partlow - Crownsville MD, US

H01G 4/06

361311000

Embodiments of the invention provide parallel plate capacitors comprising a bulk single crystal or single crystal film dielectric material disposed between the parallel plates and capacitors comprising one or more bulk single crystal or single crystal film dielectrics each disposed between two electrodes. Energy storage devices incorporating these capacitors also are disclosed.

6066865, May 23, 2000

Apr 14, 1998

9/059891

Charles L. A. Cerny - Huber Heights OH
Christopher A. Bozada - Dayton OH
Gregory C. DeSalvo - Beavercreek OH
John L. Ebel - Beavercreek OH
Ross W. Dettmer - Dayton OH
James K. Gillespie - Cedarville OH
Charles K. Havasy - Laurel MD
Thomas J. Jenkins - Fairborn OH
Kenichi Nakano - Beavercreek OH
Carl I. Pettiford - Beavercreek OH
Tony K. Quach - Kettering OH
James S. Sewell - Kettering OH
G. David Via - Dayton OH

The United States of America as represented by the Secretary of the Air
Force - Washington DC

H01L 310328

257194

An enhancement mode periodic table group III-IV semiconductor field-effect transistor device is disclosed. The disclosed transistor includes single metallization for ohmic and Schottky barrier contacts, a permanent non photosensitive passivation layer (a layer which has also been used for masking purposes during fabrication of the transistor) and a gate element of small dimension and shaped cross section as needed to provide desirable microwave spectrum electrical characteristics. The transistor of the invention is fabricated from undoped semiconductor materials disposed in a layered wafer structure and selectively doped by ion implantation to achieve either a p-channel or an n-channel transistor. The semiconductor materials may include two, one or zero buffer layers in their layer structure. The disclosed transistor is of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

6020226, Feb 1, 2000

Apr 14, 1998

9/059892

Charles L. A. Cerny - Huber Heights OH
Christopher A. Bozada - Dayton OH
Gregory C. DeSalvo - Beavercreek OH
John L. Ebel - Beavercreek OH
Ross W. Dettmer - Dayton OH
James K. Gillespie - Cedarville OH
Charles K. Havasy - Laurel MD
Thomas J. Jenkins - Fairborn OH
Kenichi Nakano - Beavercreek OH
Carl I. Pettiford - Beavercreek OH
Tony K. Quach - Kettering OH
James S. Sewell - Kettering OH
G. David Via - Dayton OH

The United States of America as represented by the Secretary of the Air
Force - Washington DC

H01L 21338

438167

A method for fabricating an enhancement mode periodic table group III-IV metal semiconductor metal field-effect transistor is described. The disclosed fabrication arrangement uses single metallization for ohmic and Schottky barrier contacts, employs initially undoped semiconductor materials--materials selectively doped in a disclosed processing step, employs a non-alloyed ohmic contact semiconductor layer and includes an inorganic dielectric material layer providing non photosensitive masking at plural points in the fabrication sequence along with permanent surface passivation. The invention uses a combined optical and electron beam lithographic process, the latter in small dimension gate areas. These attributes are combined to provide a field-effect transistor capable of microwave frequency use, of reduced fabrication cost, low electrical energy operating requirements increased dimensional accuracy and state of the art electrical performance. Fabricated device characteristics are also disclosed.

5796131, Aug 18, 1998

Jul 22, 1996

8/684759

Kenichi Nakano - Beavercreek OH
Christopher A. Bozada - Dayton OH
Tony K. Quach - Kettering OH
Gregory C. DeSalvo - Beavercreek OH
G. David Via - Dayton OH
Ross W. Dettmer - Dayton OH
Charles K. Havasy - Kettering OH
James S. Sewell - Kettering OH
John L. Ebel - Beavercreek OH
James K. Gillespie - Cedarville OH

The United States of America as represented by the Secretary of the Air
Force - Washington DC

H01L 2980

257284

A periodic table group III-IV metal semiconductor metal field-effect transistor device is described. The disclosed device includes single metalization for ohmic and Schottky barrier contacts, an elective permanent etch stop layer, a non-alloyed ohmic contact semiconductor layer and a permanent non photosensitive secondary mask element. The invention may be achieved with one of an all optical lithographic process and a combined optical and electron beam lithographic process The disclosed field-effect transistor device is of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.