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Jayanth N Rao, Age 581106 Mckenny Ct, Folsom, CA 95630

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Known as:
Jayanth R Rao Jayanth N Rad Jayanth Roa
Related to:
Vivek Subramanya

Jayanth Rao Phones & Addresses

1106 Mckenny Ct, Folsom, CA 95630 (916) 353-0814

114 Farham Dr, Folsom, CA 95630 (916) 985-7081

Rancho Cordova, CA

Boston, MA

Northborough, MA

Sacramento, CA

114 Farham Dr, Folsom, CA 95630

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Jayanth N Rao

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Work

Position: Production Occupations

Education

Degree: Bachelor's degree or higher

Emails

r***[email protected]

Mentions for Jayanth N Rao

Career records & work history

Medicine Doctors

Jayanth G. Rao

Specialties:
Radiation Oncology, Medical Oncology
Work:
21st Century Oncology
3406 N Lecanto Hwy STE A, Beverly Hills, FL 34465
(352) 746-1100 (phone) (352) 746-3779 (fax)
21St Century Oncology
3201 SW 33 Rd, Ocala, FL 34474
(352) 291-2495 (phone) (352) 291-2498 (fax)
Education:
Medical School
Gandhi Med Coll, Ntr Univ of Hlth Sci, Hyderabad, Ap, India
Graduated: 1977
Procedures:
Chemotherapy
Conditions:
Anemia, Bladder Cancer, Cervical Cancer, Gastric Cancer, Hyperthyroidism, Hypothyroidism, Kidney Cancer, Laryngeal Cancer, Leukemia, Liver Cancer, Lung Cancer, Malignant Neoplasm of Colon, Malignant Neoplasm of Esophagus, Malignant Neoplasm of Female Breast, Malignant Neoplasm of Female Genitourinary Organs, Melanoma, Multiple Myeloma, Non-Hodgkin's Lymphoma, Ovarian Cancer, Pancreatic Cancer, Prostate Cancer, Rectal, Abdomen, Small Intestines, or Colon Cancer, Skin Cancer, Testicular Cancer, Thyroid Cancer, Uterine Cancer
Languages:
English, Spanish
Description:
Dr. Rao graduated from the Gandhi Med Coll, Ntr Univ of Hlth Sci, Hyderabad, Ap, India in 1977. He works in Ocala, FL and 1 other location and specializes in Radiation Oncology and Medical Oncology. Dr. Rao is affiliated with Citrus Memorial Hospital, Munroe HMA Hospital LLC, Ocallaghan Regional Medical Center and Seven Rivers Regional Medical Center.

Jayanth V. Rao

Specialties:
Diagnostic Radiology, Radiology
Work:
Lutheran Medical Center Radiology
150 55 St, Brooklyn, NY 11220
(718) 630-7400 (phone) (718) 630-6453 (fax)
Education:
Medical School
Bangalore Med Coll, Bangalore Univ, Bangalore, Karnataka, India
Graduated: 1974
Languages:
English, Spanish
Description:
Dr. Rao graduated from the Bangalore Med Coll, Bangalore Univ, Bangalore, Karnataka, India in 1974. He works in Brooklyn, NY and specializes in Diagnostic Radiology and Radiology. Dr. Rao is affiliated with Lutheran Medical Center.

Jayanth Rao resumes & CV records

Resumes

Jayanth Rao Photo 27

Jayanth Rao

Publications & IP owners

Us Patents

Method And Apparatus To Facilitate Shared Pointers In A Heterogeneous Platform

US Patent:
8566537, Oct 22, 2013
Filed:
Mar 29, 2011
Appl. No.:
13/074779
Inventors:
Yang Ni - Sunnyvale CA, US
Rajkishore Barik - Houston TX, US
Ali-Reza Adl-Tabatabai - San Jose CA, US
Tatiana Shpeisman - Menlo Park CA, US
Jayanth N. Rao - Folsom CA, US
Ben J. Ashbaugh - Folsom CA, US
Tomasz Janczak - Gdansk, PL
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
G06F 13/00
G06F 13/28
US Classification:
711147, 711137, 711148, 711149, 711150, 711151, 711152, 711153, 711168
Abstract:
A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

Load Balancing In Heterogeneous Computing Environments

US Patent:
2012019, Jul 26, 2012
Filed:
Apr 26, 2011
Appl. No.:
13/094449
Inventors:
Jayanth N. Rao - Folsom CA, US
Eric C. Samson - Folsom CA, US
International Classification:
G06F 9/46
US Classification:
718105
Abstract:
Load balancing may be achieved in heterogeneous computing environments by first evaluating the operating environment and workload within that environment. Then, if energy usage is a constraint, energy usage per task for each device may be evaluated for the identified workload and operating environments. Work is scheduled on the device that maximizes the performance metric of the heterogeneous computing environment.

Memory Sharing Via A Unified Memory Architecture

US Patent:
2014004, Feb 20, 2014
Filed:
Aug 17, 2012
Appl. No.:
13/588453
Inventors:
Jayanth N. Rao - Folsom CA, US
Murali Sundaresan - Sunnvyale CA, US
Assignee:
INTEL CORPORATION - Santa Clara CA
International Classification:
G06T 11/60
G06F 12/00
US Classification:
345502, 345565, 711147
Abstract:
A method and system for sharing memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein. The method includes allocating a surface within a physical memory and mapping the surface to a plurality of virtual memory addresses within a CPU page table. The method also includes mapping the surface to a plurality of graphics virtual memory addresses within an I/O device page table.

Shared Virtual Memory

US Patent:
2014004, Feb 20, 2014
Filed:
Aug 17, 2012
Appl. No.:
13/588308
Inventors:
Jayanth N. Rao - Folsom CA, US
Ronald W. Silvas - Sacramento CA, US
Ankur N. Shah - Folsom CA, US
Assignee:
INTEL CORPORATION - Santa Clara CA
International Classification:
G06T 11/60
US Classification:
345543
Abstract:
A method and system for shared virtual memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein. The method includes allocating a surface within a system memory. A CPU virtual address space may be created, and the surface may be mapped to the CPU virtual address space within a CPU page table. The method also includes creating a GPU virtual address space equivalent to the CPU virtual address space, mapping the surface to the GPU virtual address space within a GPU page table, and pinning the surface.

Method And Apparatus To Facilitate Shared Pointers In A Heterogeneous Platform

US Patent:
2014007, Mar 13, 2014
Filed:
Sep 6, 2013
Appl. No.:
14/020616
Inventors:
Yang Ni - Sunnyvale CA, US
Rajkishore Barik - Houston TX, US
Ali-Reza Adl-Tabatabai - San Jose CA, US
Tatiana Shpeisman - Menlo Park CA, US
Jayanth N. Rao - Folsom CA, US
Ben J. Ashbaugh - Folsom CA, US
Tomasz Janczak - Gdansk, PL
International Classification:
G06T 1/60
US Classification:
345541
Abstract:
A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

Sampling, Fault Management, And/Or Context Switching Via A Compute Pipeline

US Patent:
2015037, Dec 31, 2015
Filed:
Jun 27, 2014
Appl. No.:
14/318562
Inventors:
JOHN A. TSAKOK - Folsom CA, US
BRANDON L. FLIFLET - Edh CA, US
JAYANTH N. RAO - Folsom CA, US
International Classification:
G06T 7/40
G06T 15/04
G06T 1/60
G06T 1/20
Abstract:
Apparatuses, systems, and methods may sample a texture, manage a page fault, and/or switch a context associated with the page fault. A three-dimensional (3D) graphics pipeline may provide texture sample location data corresponding to a texture, wherein sampling of the texture is to be executed external to the 3D graphics pipeline. A compute pipeline may execute sampling of the texture utilizing the texture sample location data and provide texture sample result data corresponding to the texture, wherein the 3D graphics pipeline may composite a frame utilizing the texture sample result data. The compute pipeline may manage a page fault, wherein the page fault and/or management of the page fault may be hidden from a graphics application. In addition, the compute pipeline may switch a compute context associated with the page fault to allow a graphics task not associated with the page fault to be executed and/or to prevent a stall.

Method And Apparatus To Facilitate Shared Pointers In A Heterogeneous Platform

US Patent:
2015018, Jul 2, 2015
Filed:
Oct 13, 2014
Appl. No.:
14/513065
Inventors:
- Santa Clara CA, US
Rajkishore Barik - Houston TX, US
Ali-Reza Adl-Tabatabai - San Jose CA, US
Tatiana Shpeisman - Menlo Park CA, US
Jayanth N. Rao - Folsom CA, US
Ben J. Ashbaugh - Folsom CA, US
Tomasz Janczak - Folsom CA, US
International Classification:
G06F 12/08
Abstract:
A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

Scheduling And Dispatch Of Gpgpu Workloads

US Patent:
2015018, Jul 2, 2015
Filed:
Dec 27, 2013
Appl. No.:
14/142681
Inventors:
Jayanth N. Rao - Folsom CA, US
Michal Mrozek - Tczew, PL
International Classification:
G06T 1/20
Abstract:
A method and system are described herein for an optimization technique on two aspects of thread scheduling and dispatch when the driver is allowed to pick the scheduling attributes. The present techniques rely on an enhanced GPGPU Walker hardware command and one dimensional local identification generation to maximize thread residency.

Possible Relatives

David R Rao  Deborah A Rao  Daniel J Rao  Deepa Rao  Deepika Rao  Danielle Rao  Darlene R Rao 

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