Jerry KuoSan Francisco, CA

Jerry Kuo Phones & Addresses

San Francisco, CA

Mentions for Jerry Kuo

Jerry Kuo resumes & CV records

Resumes

Jerry Kuo Photo 26

Antenna Design Engineer

Position:
Antenna Design Engineer at AMAZON- Lab126
Location:
Cupertino, California
Industry:
Wireless
Work:
AMAZON- Lab126 - Cupertino since 2011
Antenna Design Engineer
UCLA - Greater Los Angeles Area Sep 2006 - Mar 2011
Graduate Student Researcher
Qualcomm - San Diego Jun 2010 - Sep 2010
Intern Research Engineer
National Taiwan University - Taipei , Taiwan 2004 - 2005
Graduate Researcher
Education:
University of California, Los Angeles 2008 - 2011
Doctor of Philosophy (PhD)
UCLA 2006 - 2007
Master of Science (M.S.), Electrical Engineering
USC 2005 - 2006
Master of Science (M.S.), Signal Processing
National Taiwan University
B.S., Electrical Engineering
Jerry Kuo Photo 27

Jerry Kuo

Location:
San Francisco Bay Area
Industry:
Semiconductors
Jerry Kuo Photo 28

Jerry Kuo

Location:
Shanghai City, China
Industry:
Medical Devices
Jerry Kuo Photo 29

Jerry Kuo

Position:
Senior Manager at SwitchPoint LLC
Location:
Seattle, Washington
Industry:
Management Consulting
Work:
SwitchPoint LLC since Jun 2011
Senior Manager
Avaya, Inc. Dec 2006 - May 2010
Senior Finance Manager
Avaya, Inc. Jul 2004 - Nov 2006
Finance Manager
Hewitt Associates Sep 1998 - Jul 2002
Business Analyst / Project Manager
Education:
University of Michigan - Stephen M. Ross School of Business 2002 - 2004
Washington University in St. Louis - Olin Business School 1994 - 1998
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Jerry Kuo

Location:
San Francisco Bay Area
Industry:
Computer Software

Publications & IP owners

Us Patents

Address Generation And Data Path Arbitration To And From Sram To Accommodate Multiple Transmitted Packets

US Patent:
5818844, Oct 6, 1998
Filed:
Jun 6, 1996
Appl. No.:
8/659728
Inventors:
Alok Singh - Fremont CA
Rajat Roy - Sunnyvale CA
Jerry Kuo - San Jose CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 1316
H04L 1256
US Classification:
370463
Abstract:
An ethernet controller for controlling the transmission of data between a station and an ethernet having four FIFOs for managing the transmission of data between the station CPU, a memory buffer, and the ethernet. The four FIFOs each have a selected size to maximize performance of the controller. The controller includes a arbiter to arbitrate which pending requests from each of the FIFOs will have priority. The controller limits the transmission of data by each FIFO to 32 bytes per grant. Each FIFO includes logic to convert data in a first bit size format to a second bit size format. The controller also includes logic to convert a 16 bit address to two 8 bit portions for transmission over an 8 bit address bus and logic to reformat the two 8 bit portions to the 16 bit address.

Public records

Vehicle Records

Jerry Kuo

Address:
1839 15 St APT 462, San Francisco, CA 94103
Phone:
(415) 225-5742
VIN:
4USFE83587LY63777
Make:
BMW
Model:
X5
Year:
2007

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