Jon Matthew Brabender, Age 59112 Morris Branch Ct, Cary, NC 27511

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112 Morris Branch Ct, Morrisville, NC 27511 (919) 469-8857

2338 Sterling Green Dr, Morrisville, NC 27560

Cary, NC

5067 Horizon Ct, West Bend, WI 53095

Grand Blanc, MI

Green Bay, WI

112 Morris Branch Ct, Cary, NC 27519 (919) 632-1091

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Jon Matthew Brabender
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Jon Brabender

Location:
Raleigh-Durham, North Carolina Area
Industry:
Computer Hardware

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John Brabender

John Brabender is a prominent Republican political consultant. He earned a degree in from Gannon University and an MBA from Cleveland State University. ...

Us Patents

Method And System For Interrupt Mapping

US Patent:
2005002, Jan 27, 2005
Filed:
Jul 24, 2003
Appl. No.:
10/626756
Inventors:
Kevin Traynor - Cary NC, US
Jon Brabender - Cary NC, US
International Classification:
G06F013/24
US Classification:
710262000
Abstract:
A method and system are described for sharing a plurality of interrupt inputs associated with a processor among a plurality of interrupt sources. Each of the plurality of interrupt sources is mapped to each of the plurality of interrupt inputs. Interrupt requests from each of the plurality of interrupt sources to one or more of the plurality of interrupt inputs are selectively enabled, e.g., via control bits. The control bits are preferably dynamically modifiable according to user preferences.

Configurable Mapping Of Timer Channels To Protection Groups

US Patent:
2020021, Jul 9, 2020
Filed:
Mar 16, 2020
Appl. No.:
16/820458
Inventors:
- Milpitas CA, US
Jon Matthew Brabender - Cary NC, US
Assignee:
RENESAS ELECTRONICS AMERICA INC. - Milpitas CA
International Classification:
G05B 19/406
G05B 19/414
Abstract:
An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits. The CPU can select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits. Each timer channel of the first group can disable an output signal in response to receiving the assertion of the first output disable signal.

Microcontroller Simple Memory Relocation Function

US Patent:
2019035, Nov 21, 2019
Filed:
Aug 5, 2019
Appl. No.:
16/532286
Inventors:
- Milpitas CA, US
Jon Matthew Brabender - Cary NC, US
International Classification:
G06F 12/10
G06F 9/32
G06F 9/445
Abstract:
A method and apparatus for microcontroller (MCU) memory relocation. The MCU includes a central processing unit (CPU) and memory, but lacks a memory management unit (MMU). In one embodiment of the method, a first program is selected for execution by the CPU. The first program is one of a plurality of programs stored in the memory of the MCU. Each of the programs includes position dependent instructions. The programs are compiled from source code written in position dependent code.

Configurable Event Selection For Microcontroller Timer/Counter Unit Control

US Patent:
2017032, Nov 9, 2017
Filed:
Jul 24, 2017
Appl. No.:
15/657549
Inventors:
- Santa Clara CA, US
Jon Matthew Brabender - Cary NC, US
International Classification:
G06F 9/30
G06F 9/54
G06F 9/30
Abstract:
An apparatus and method for dynamically controlling functional aspects of an MCU. In one embodiment an MCU includes a central processing unit (CPU), a memory for storing instructions executable by the CPU, and a T/C channel coupled to receive control values generated by CPU and M event signals, wherein M is an integer greater than 1. The T/C channel is configured to select one or more of the M event signals based on the one or more of the control values. The T/C channel is configured to generate a control signal as a function of the selected one or more of the M event signals. A function of the T/C channel can be controlled by the control signal.

Synchronized Image Expansion

US Patent:
2017011, Apr 27, 2017
Filed:
Oct 22, 2015
Appl. No.:
14/919965
Inventors:
- Santa Clara CA, US
Jon Matthew Brabender - Cary NC, US
International Classification:
G09G 5/36
G09G 5/393
G06T 9/00
Abstract:
Various systems and methods related to displaying images from compressed data. For example, one method involves expanding a first portion of compressed data. The expanded first portion is written to a first memory location in a first memory. In response to detecting that a first segment of the expanded first portion has been read, a second portion of the compressed data is expanded. The expanded second portion is written to the first memory location.

Software Architecture For Embedded Systems

US Patent:
2017010, Apr 13, 2017
Filed:
Oct 11, 2016
Appl. No.:
15/290491
Inventors:
- Santa Clara CA, US
Bhupesh Kharwa - San Ramon CA, US
Jon Matthew Brabender - Cary NC, US
Kristine M. Jassmann - Santa Cruz CA, US
International Classification:
G06F 9/44
G06F 9/45
Abstract:
Provided herein are various systems, methods and architectures for enabling a microcontroller manufacturer to provide certain modification functionality to product vendors, while still maintaining the level of control needed to ensure that a product vendor does not inadvertently (or otherwise) create code that causes the microcontroller to not work properly. In one embodiment, this functionality can be performed through the steps of displaying an initial stack of software modules to a user, receiving instructions to modify the initial stack of software modules to create a modified stack of software modules, compiling the modified stack of software modules to produce compiled computer instructions, and flashing the embedded memory of the microcontroller with the compiled computer instructions.

Software Platform For Embedded Systems

US Patent:
2017010, Apr 13, 2017
Filed:
Oct 11, 2016
Appl. No.:
15/290350
Inventors:
- Santa Clara CA, US
Bhupesh Kharwa - San Ramon CA, US
Jon Matthew Brabender - Cary NC, US
Kristine M. Jassmann - Santa Cruz CA, US
John L. Dallaway - Cambridge, GB
James Mark Deadman - Kent, GB
International Classification:
G06F 9/445
Abstract:
A software platform for embedded systems. In one embodiment, a package is received and stored in memory of a computer system. The package comprises a plurality of software components and a real time operating system (RTOS). The plurality of software components are configured to provide respective services to any one of a plurality of applications executing on a microcontroller. The RTOS is configured for direct exchange of information with each of the plurality of software components.

Secure Code Delivery

US Patent:
2017010, Apr 13, 2017
Filed:
Oct 12, 2016
Appl. No.:
15/291766
Inventors:
- Santa Clara CA, US
Jon Matthew Brabender - Cary NC, US
John L. Dallaway - Cambridge, GB
James Mark Deadman - Kent, GB
Mark Goodchild - Wargrave, GB
Noriyuki Mori - San Mateo CA, US
Murthy L. Vedula - Sunnyvale CA, US
International Classification:
G06F 21/12
G06F 21/57
G06F 12/14
G06F 9/44
G06F 21/62
Abstract:
A method and apparatus for secure code delivery. In one embodiment the method is implemented on a computer system, and includes reading an access privilege from a first set of access privileges, wherein the first set of access privileges corresponds to a first file that comprises first encrypted source code. The first encrypted source code is decrypted to produce first decrypted source code. A determination is made as to whether the first access privilege is set to a first state or a second state. If the first access privilege is set to the first state, a first software development tool is permitted to access and process the first decrypted source code. If the first access privilege is set to a second state, the first software development tool is denied access to decrypted source code.

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