Kenny Y Wu2268 Hendy Ln, San Jose, CA 95124

2012028, Nov 15, 2012

May 9, 2011

13/103884

Parav Pandit - Costa Mesa CA, US
Masoodur Rahman - Costa Mesa CA, US
Kenny Meng-Hung Wu - Costa Mesa CA, US
Chaitanya Tumuluri - Costa Mesa CA, US

EMULEX DESIGN & MANUFACTURING CORPORATION - Costa Mesa CA

H04L 29/06
G06F 15/167

370474, 709212

Disclosed herein are methods and apparatus for accelerating RoCE packet sequence transmission and reducing processing latency in received RoCE packets. Under the disclosed method, the RoCE protocol stack and RDMA verbs are implemented partially in the host software and partially in the adapter hardware, thereby providing a better balance between simplifying the adapter configuration and maximizing the host processing efficiency. Particularly, the adapter implemented with partial RoCE offload is able to perform a few major functionalities under the RoCE protocol, such as offloading a complete RoCE packet sequence for transmission, building individual packets out of the RoCE packet sequence and performing Invariant CRC calculation, insertion, validation and removal thereof.

2022033, Oct 20, 2022

Apr 16, 2021

17/232944

- Singapore, SG
Kenny Wu - San Jose CA, US
Ravi Shenoy - San Jose CA, US
Gregorio Gervasio, JR. - San Jose CA, US
Lalit Chhabra - San Jose CA, US
Mark Karnowski - Irvine CA, US
James Winston Smart - Irvine CA, US
Vuong Cao Nguyen - Irvine CA, US

G06F 13/16
G06F 13/28
G06F 12/1009
G06F 12/0806

Systems and methods relate to a bus adapter for a storage network. The bus adaptor includes a context memory comprising a first storage for uncacheable exchange resource indicators (XRI) and a second storage for cacheable XRI. The bus adapter also includes a host backing store unit configured to provide access to the different tier memories present locally or externally in the host memory extension using several caching sub-units and with the capability of an optional pinning operation for the cacheable XRI based upon at least one of input/output phase, first in line up to a limit, a region of a virtual context address associated with the cacheable XRI indicators, a protocol associated with the cacheable XRI, a size of a transaction, or work queue information.

2019032, Oct 24, 2019

Apr 23, 2018

15/960251

- Singapore, SG
Gregorio Gervasio, JR. - Santa Clara CA, US
Kenny Wu - Saratoga CA, US
Mark Karnowski - Huntington Beach CA, US

G06F 9/48

A number of command processing devices, architectures, and methods are described. One example of a command processing device is disclosed to include a classification engine configured to classify input commands, a sequencer in communication with the classification engine, one or more thread managers in communication with the sequencer, and one or more sub-processing engines in communication with each of the one or more thread managers. The sequencer may control staging of work across multiple threads and processing elements within threads. Each of the one or more thread managers are configured to delegate work to different sub-processing engines. Each of the one or more sub-processing engines are configured to perform sub-tasks in connection with completing processing of an input command received at the classification engine based on particular sub-tasks assigned to the one or more sub-processing engines by the one or more thread managers.

2015036, Dec 17, 2015

Aug 26, 2015

14/835808

- Costa Mesa CA, US
Masoodur Rahman - Costa Mesa CA, US
Kenny Meng-Hung Wu - Costa Mesa CA, US
Chaitanya Tumuluri - Costa mesa CA, US

H04L 29/06

A method, network device and system for remote direct memory access (RDMA) over Converged Ethernet (RoCE) packet sequence acceleration are disclosed. The network device comprises one or more components for communicating with a host system. A network communication protocol, such as RoCE, is implemented by a combination of the one or more components and the host system.

2015015, Jun 4, 2015

Feb 11, 2015

14/619180

- Costa Mesa CA, US
Masoodur Rahman - Costa Mesa CA, US
Kenny Meng-Hung Wu - Costa Mesa CA, US
Chaitanya Tumuluri - Costa mesa CA, US

H04L 29/06

A method, network device and system for remote direct memory access (RDMA) over Converged Ethernet (RoCE) packet sequence acceleration are disclosed. The network device comprises one or more functionality components for communicating with a host system. The host system is configured for implementing a first set of functionalities of a network communication protocol, such as RoCE. The one or more functionality components are also operable to implement a second set of functionalities of the network communication protocol.

2014019, Jul 10, 2014

Mar 12, 2014

14/206640

- Costa Mesa CA, US
Masoodur Rahman - Costa Mesa CA, US
Kenny Meng-Hung Wu - Costa Mesa CA, US
Chaitanya Tumuluri - Costa mesa CA, US

Emulex Corporation - Costa Mesa CA

G06F 15/173
H04L 12/24

709212, 709220

A method, network device and system for remote direct memory access (RDMA) over Converged Ethernet (RoCE) packet sequence acceleration are disclosed. The network device comprises one or more functionality components for communicating with a host system. The host system is configured for implementing a first set of functionalities of a network communication protocol, such as RoCE. The one or more functionality components are also operable to implement a second set of functionalities of the network communication protocol.