Location:
655 Concord Ave, Cambridge, MA 02138
Work:
Nanosemi Inc
2014 - 2020
Technical Staff and Co-Founder
Ieee
2011 - 2019
Ieee Volunteer
Mit Lincoln Laboratory
Aug 2011 - Apr 2014
Member of Technical Staff
Samsung
Sep 2010 - Mar 2011
Design Engineer
Georgia Institute of Technology
Jul 2007 - 2011
Graduate Research Engineer
Jul 2007 - 2011
Senior Principal Systems Engineer
Education:
Georgia Institute of Technology 2007 - 2011
Doctorates, Doctor of Philosophy, Computer Engineering, Philosophy
Georgia Institute of Technology 2009
Master of Science, Masters, Computer Engineering
Uc Santa Barbara 2003 - 2007
Bachelors, Bachelor of Science, Electrical Engineering
Arcadia High School 1999 - 2003
Skills:
Circuit Design, Agilent Ads, Mixed Signal, Low Power Design, Analog, Adcs, Ic, Cmos, Signal Processing, Cadence Virtuoso, Analog Circuit Design, Spice, Verilog, Integrated Circuit Design, Simulations, Matlab, Radio Frequency, Field Programmable Gate Arrays, Semiconductors