Khanh L Luu, Age ~796000 Briar Glade Dr, Houston, TX 77072

Khanh Luu Phones & Addresses

6000 Briar Glade Dr, Houston, TX 77072 (281) 498-0433

6639 Briar Glade Dr, Houston, TX 77072 (281) 498-0433 (281) 615-2973

San Francisco, CA

Mentions for Khanh L Luu

Resumes

Resumes

Khanh Luu Photo 1

Sr. Test R&Amp;D Engineer At Intel Corporation

Position:
Sr. Test R&D Engineer at Intel Corporation
Location:
San Francisco Bay Area
Industry:
Semiconductors
Work:
Intel Corporation - Santa Clara since Jul 2011
Sr. Test R&D Engineer
TELEGENT SYSTEM Aug 2008 - Jul 2011
Senior Staff RF characterization Engineer
TZERO Dec 2005 - Aug 2008
Senior ATE Test/Product Engineer
MICROLINEAR Feb 2004 - Dec 2005
Senior ATE Product/Test Engineer
FILTRONIC SOLID STATE Apr 2001 - Aug 2003
Senior ATE Test Development Engineer
CEL Jun 1997 - Apr 2001
Development Charaterization Test Engineer
SAMSUNG MICROWAVE SEMI Aug 1990 - Jun 1997
Product Test Engineer
Education:
Cogswell Polytechnical 1996 - 1998
Bachelor, Electrical Engineer
Georgia Institute of Technology 1994
Khanh Luu Photo 2

Khanh Luu

Location:
San Francisco Bay Area
Industry:
Semiconductors
Khanh Luu Photo 3

Student At California State University-Hayward

Location:
San Francisco Bay Area
Industry:
Financial Services
Khanh Luu Photo 4

Khanh Luu

Location:
United States

Publications

Us Patents

Method And Apparatus For Accessing Registers During Deferred Execution

US Patent:
7487335, Feb 3, 2009
Filed:
Oct 14, 2005
Appl. No.:
11/251427
Inventors:
Shailender Chaudhry - San Francisco CA,
Syed I. Haq - Sunnyvale CA,
Mohammed M. Rahman - San Jose CA,
Khanh Luu - San Jose CA,
Assignee:
Sun Microsystems, Inc. - Santa Clara CA
International Classification:
G06F 9/00
US Classification:
712214, 712218, 712228
Abstract:
One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint, which includes a checkpointed version of the register file. Next, the system defers the instruction, which involves storing the instruction along with any resolved source operands for the instruction into a deferred buffer. The system then executes subsequent instructions in an execute-ahead mode which operates on a future version of the register file, wherein instructions that cannot be executed because of unresolved data dependencies are deferred, and wherein other non-deferred instructions are executed in program order. If the unresolved data dependency is resolved during the execute-ahead mode, the system executes deferred instructions in a deferred mode, which operates on a deferred version of the register file, wherein deferred instructions which can be executed are executed in program order, and wherein other deferred instructions that still cannot be executed because of unresolved data dependencies are deferred again.

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