Michael Saied Ameen, Age 652 Coffin St, Plum Island, MA 01950

Michael Ameen Phones & Addresses

2 Coffin St, Newburyport, MA 01950 (978) 465-5169

Phoenix, AZ

Garner, NC

Cornwall, NY

Beverly, MA

Mountainville, NY

Tempe, AZ

2 Coffin St, Newburyport, MA 01950

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Work

Position: Production Occupations

Education

Degree: Bachelor's degree or higher

Mentions for Michael Saied Ameen

Career records & work history

Lawyers & Attorneys

Michael Ameen Photo 1

Michael Ameen - Lawyer

Office:
Hargrove, Smelley & Strickland
Specialties:
Energy, Real Estate, Litigation, Corporate / Incorporation, Oil & Gas, Wills & Living Wills, Wills & Living Wills
ISLN:
922160548
Admitted:
2012
University:
Millsaps College, B.A.; Louisiana State University, M.B.A.
Law School:
Louisiana State University, J.D., 2012

Michael Ameen resumes & CV records

Resumes

Michael Ameen Photo 26

Chief Process Scientist, Axcelis Technologies

Location:
3112 Parkview Way, Nampa, ID 83687
Industry:
Semiconductors
Work:
Axcelis Technologies
Chief Process Scientist, Axcelis Technologies
Axcelis Technologies 1997 - 2007
Manager, Director of Process Technology
Materials Research Corporation 1991 - 1997
Senior Scientist
Honeywell 1986 - 1988
Senior Front End Process Engineer
Education:
North Carolina State University 1988 - 1991
University of North Carolina at Chapel Hill 1981 - 1985
Doctorates, Doctor of Philosophy, Chemistry
Davidson College 1977 - 1981
Bachelors, Bachelor of Science, Chemistry
Skills:
Semiconductors, Design of Experiments, Thin Films, Semiconductor Industry, Characterization, Silicon, R&D, Materials Science, Pvd, Spc, Metrology, Electronics, Process Engineering, Cross Functional Team Leadership, Failure Analysis, Root Cause Analysis, Mems, Ic, Optics, Ion Implantation, Research and Development, Cvd, Integrated Circuits, Materials
Michael Ameen Photo 27

Self

Work:

Self

Publications & IP owners

Us Patents

Apparatus And Method For Preventing The Premature Mixture Of Reactant Gases In Cvd And Pecvd Reactions

US Patent:
6368987, Apr 9, 2002
Filed:
Jun 6, 2000
Appl. No.:
09/587916
Inventors:
Stanislaw Kopacz - Phoenix AZ
Douglas Arthur Webb - Phoenix AZ
Gerrit Jan Leusink - Tempe AZ
Rene Emile LeBlanc - East Haven CT
Michael S. Ameen - Phoenix AZ
Joseph Todd Hillman - Scottsdale AZ
Robert F. Foster - Mesa AZ
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
H01L 2131
US Classification:
438788, 118723 E, 118725, 118724, 118723 I, 438795
Abstract:
A method and apparatus for depositing a film by chemical vapor deposition comprises a showerhead for dispersing reactant gases into the processing space wherein the showerhead has a first space therein operable for receiving and dispersing the first reacting gas, and has a second space therein, generally isolated from the first space, and operable for receiving and dispersing the second reactant gas separate from the first gas dispersion for maintaining segregation of reactant gases and generally preventing premature mixture of the gases prior to their introduction into the processing space to prevent premature deposition in the system.

Method Of Passivating And Stabilizing A Ti-Pecvd Process Chamber And Combined Ti-Pecvd/Tin-Cvd Processing Method And Apparatus

US Patent:
6635569, Oct 21, 2003
Filed:
Apr 20, 1998
Appl. No.:
09/063196
Inventors:
Michael S. Ameen - Phoenix AZ
Joseph T. Hillman - Scottsdale AZ
Gert Leusink - Tempe AZ
Michael Ward - Phoenix AZ
Tugrul Yasar - Scottsdale AZ
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
H01L 2144
US Classification:
438680, 438685, 134 11, 134 2
Abstract:
A methodology is described by which a processing chamber used to deposit plasma-enhanced Ti-CVD films may be conditioned and passivated efficiently after either a wet cleaning or in-situ chemical cleaning, or after each successive deposition sequence. The technique allows a CVD process, such as, for example, a Ti-PECVD process, to recover film properties, such as resistivity, uniformity, and deposition rate, in a minimum time and following a minimum number of conditioning wafers, thereby improving the productivity of the system. The technique also maintains the stability of the system during continuous operation. This allows for the processing of thousands of wafers between in-situ cleaning of the chamber. Immediately following chamber cleaning and before performing the Ti-CVD process on wafers, the methodology includes forming a plasma with reactive gas to heat reactor components, then adding the coating material containing reactant to deposit the coating material onto the reactor components, then introducing an oxidizing or reducing gas into the chamber to stabilize the coating on the reactor parts, followed by resumption of the wafer coating process. During continuous operation in the Ti-CVD of wafers, the methodology includes introducing a mixture of Ar and H gases forming a plasma to heat reactor components where necessary, then introducing and chemically reducing TiCl to deposit Ti on the heated reactor components, then introducing oxidizing or reducing gas into the chamber for a period of time necessary to stabilize the Ti film.

Method And Apparatus For Preparing And Metallizing High Aspect Ratio Silicon Semiconductor Device Contacts To Reduce The Resistivity Thereof

US Patent:
5834371, Nov 10, 1998
Filed:
Jan 31, 1997
Appl. No.:
8/791954
Inventors:
Michael S. Ameen - Phoenix AZ
Joseph T. Hillman - Scottsdale AZ
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
C23C 1606
US Classification:
438656
Abstract:
A CVD apparatus is equipped with a cleaning gas source, selectively connectable to a gas inlet of the chamber of the apparatus, structure, to supply a gas mixture of hydrogen and argon in which the hydrogen content is between 20 percent and 80 percent by volume. A selectively operable 450 MHz MF energy source is coupled to the chamber to energize a plasma in gas. A selectively operable 13. 56 MHz HF energy source, controllable independently of the MF energy source and connected between the wafer support and a chamber anode biases a wafer on the support to less than 100 volts, preferably 15 to 35 volts, negative. A heater heats the wafer to temperature about 550. degree. C. Preferably, a turbo molecular pump is used to pump the cleaning gas while maintaining a pressure of between 1 mTorr and 10 Torr and at a rate of from 3 to 12 sccm.

Control Of The Crystal Orientation Dependent Properties Of A Film Deposited On A Semiconductor Wafer

US Patent:
5455197, Oct 3, 1995
Filed:
Jul 16, 1993
Appl. No.:
8/093058
Inventors:
Abe Ghanbari - W. Nyack NY
Michael Ameen - Cornwall NY
Assignee:
Materials Research Corporation - Orangeburg NY
International Classification:
H01L 21283
C23C 1435
US Classification:
437192
Abstract:
A method of controlling the crystal orientation dependent properties, such as residual stress, barrier layer effectiveness and resistivity, of reactively sputtered films such as titanium nitride, provide a method of optimizing the design parameters of the deposition apparatus and a method of utilizing the apparatus to produce coated Wafers. A sputtering target is maintained spaced from a wafer with a rotating magnetic field produced by a magnet rotating behind the target. An auxiliary magnet is provided at the wafer to unbalance the target magnetic field and allow ion flux from the plasma to reach the substrate. A film is deposited and the properties of the resulting film measured, particularly, in the case of titanium nitride deposition, the ratio of to crystal orientation, as well as the ratio uniformity. The auxiliary magnet configuration and target to wafer spacing are varied and the ratio remeasured. The variation and measurement are repeated until the ratio and ratio uniformity are achieved.

Method Of Low Temperature Plasma Enhanced Chemical Vapor Deposition Of Tin Film Over Titanium For Use In Via Level Applications

US Patent:
5989652, Nov 23, 1999
Filed:
Jan 31, 1997
Appl. No.:
8/791955
Inventors:
Michael S. Ameen - Phoenix AZ
Joseph T. Hillman - Scottsdale AZ
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
C23C 1402
US Classification:
427534
Abstract:
A titanium/titanium nitride film stack can be formed with reduced amounts of impurity by depositing onto a substrate a film of titanium using plasma-enhanced chemical vapor deposition of titanium tetrachloride and hydrogen. This film is then subjected to a hydrogen/argon plasma which significantly reduces the chlorine content of the titanium film. The titanium film can then be subjected to an ammonia plasma which will form a thin layer of titanium nitride which is then coated with a thick layer of titanium nitride using plasma-enhanced chemical vapor deposition of titanium tetrachloride and ammonia. The hydrogen/argon anneal significantly reduces the chlorine content of the titanium film and thus the chlorine content at the titanium substrate interface, particularly when the substrate contains aluminum. This enhances the overall reliability of the formed product.

Method For Forming Salicides

US Patent:
5972790, Oct 26, 1999
Filed:
Jun 9, 1995
Appl. No.:
8/489040
Inventors:
Chantal Arena - Le Fontanil, FR
Robert F. Foster - Phoenix AZ
Joseph T. Hillman - Scottsdale AZ
Michael S. Ameen - Phoenix AZ
Jacques Faguet - Toulouse, FR
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
H01L 214763
US Classification:
438649
Abstract:
Titanium is deposited onto a semiconductor interconnect to form a salicide structure by plasma-enhanced chemical vapor deposition. The reactant gases, including titanium tetrachloride, hydrogen and optionally argon, are combined. A plasma is created using RF energy and the plasma contacts the rotating semiconductor material. This causes titanium to be deposited which reacts with exposed silicon to form titanium silicide without any subsequent anneal. Other titanium deposited on the surface, as well as titanium-rich silicon compositions (TiSi. sub. X wherein X is

Method For Single Chamber Processing Of Pecvd-Ti And Cvd-Tin Films For Integrated Contact/Barrier Applications In Ic Manufacturing

US Patent:
6274496, Aug 14, 2001
Filed:
Apr 21, 2000
Appl. No.:
9/553833
Inventors:
Gerrit J. Leusink - Tempe AZ
Michael G. Ward - Phoenix AZ
Michael S. Ameen - Newburyport MA
Joseph T. Hillman - Scottsdale AZ
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
H01L 214763
US Classification:
438685
Abstract:
A single chamber method for depositing a stack including titanium and titanium nitride on a wafer surface. Titanium is deposited by plasma enhanced chemical vapor deposition and then plasma nitrided. Titanium nitride is subsequently deposited by a thermal chemical vapor deposition process. Advantageously, the temperatures of the substrate and showerhead as well as the internal chamber pressure are maintained at substantially constant values throughout deposition of the stack.

Apparatus For Preparing And Metallizing High Aspect Ratio Silicon Semiconductor Device Contacts To Reduce The Resistivity Thereof

US Patent:
6143128, Nov 7, 2000
Filed:
May 27, 1998
Appl. No.:
9/085217
Inventors:
Michael S. Ameen - Newburyport MA
Joseph T. Hillman - Scottsdale AZ
Assignee:
Tokyo Electron Limited - Tokyo
International Classification:
C23F 102
US Classification:
156345
Abstract:
A contact cleaning apparatus is equipped with a cleaning gas source, selectively connectable to a gas inlet of the chamber of the apparatus, structure, to supply a gas mixture of hydrogen and argon in which the hydrogen content is between 20 percent and 80 percent by volume. A selectively operable 450 MHz MF energy source is coupled to the chamber to energize a plasma in gas. A selectively operable 13. 56 MHz HF energy source, controllable independently of the MF energy source and connected between the substrate support and a chamber anode biases a wafer on the support to less than 100 volts, preferably 15 to 35 volts, negative. A heater heats the wafer to temperature about 550. degree. C. Preferably, a turbo molecular pump is used to pump the cleaning gas while maintaining a pressure of between 1 mTorr and 10 Torr and at a rate of from 3 to 12 sccm.

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