Normand Bergeron18 Mayhew St, Hopkinton, MA 01748

Normand Bergeron Phones & Addresses

18 Mayhew St, Hopkinton, MA 01748 (508) 435-4436

218 Lumber St, Hopkinton, MA 01748

Work

Position: Protective Service Occupations

Education

Degree: Associate degree or higher

Mentions for Normand Bergeron

Normand Bergeron resumes & CV records

Resumes

Normand Bergeron Photo 20

President

Location:
Hopkinton, MA
Industry:
Construction
Work:
Eastern Concrete
President
Skills:
All Phases of Concrete Construction
Normand Bergeron Photo 21

Normand Bergeron

Normand Bergeron Photo 22

Normand Bergeron

Publications & IP owners

Us Patents

High Mobility Transistor With Opposed-Gates

US Patent:
4839310, Jun 13, 1989
Filed:
Jan 27, 1988
Appl. No.:
7/149125
Inventors:
Mark A. Hollis - Concord MA
William D. Goodhue - Chelmsford MA
Kirby B. Nichols - Chelmsford MA
Normand J. Bergeron - New Bedford MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
H01L 2980
US Classification:
437 41
Abstract:
Horizontal and vertical transistors, such as, HEMT/SDHT devices are described with opposed gates for preventing substrate leakage current along with the methods for making same. Also a process for making single gate angled V-HEMT devices is described.

Vertical Transistor Device Fabricated With Semiconductor Regrowth

US Patent:
4903089, Feb 20, 1990
Filed:
Feb 2, 1988
Appl. No.:
7/151395
Inventors:
Mark A. Hollis - Concord MA
Carl O. Bozler - Sudbury MA
Kirby B. Nichols - Chelmsford MA
Normand J. Bergeron - New Bedford MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
H01L 2980
US Classification:
357 22
Abstract:
A vertical transistor device is characterized by active regions vertically separated by a narrower control region. The control region is defined by conducting layer extensions which extend into a groove within which semiconductor material is regrown during device fabrication. The device is further characterized by regions of isolating material, located horizontally adjacent to the active regions, said isolating material serving to reduce parasitic capacitance and improve thermal distribution within the device, thereby improving frequency and power performance.

Vertical Transistor Device Fabricated With Semiconductor Regrowth

US Patent:
5106778, Apr 21, 1992
Filed:
Feb 16, 1990
Appl. No.:
7/481860
Inventors:
Mark A. Hollis - Concord MA
Carl O. Bozler - Sudbury MA
Kirby B. Nichols - Chelmsford MA
Normand J. Bergeron - New Bedford MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
H01L 2120
H01L 2118
H01L 2195
US Classification:
437 90
Abstract:
A vertical transistor device is characterized by active regions vertically separated by a narrower control region. The control region is defined by conducting layer extensions which extend into a groove within which semiconductor material is regrown during device fabrication. The device is further characterized by regions of isolating material, located horizontally adjacent to the active regions, said isolating material serving to reduce parasitic capacitance and improve thermal distribution within the device, thereby improving frequency and power performance.

Isbn (Books And Publications)

Ce Matin-La: [Roman]

Author:
Normand Bergeron
ISBN #:
2894311265

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