Peter Guoqing Yan, Age 6416232 Deer Lake Rd, Rockville, MD 20855

Peter Yan Phones & Addresses

16232 Deer Lake Rd, Derwood, MD 20855 (301) 548-9357

Rockville, MD

Gainesville, FL

Grand Prairie, TX

Saint Cloud, FL

Kissimmee, FL

College Park, MD

Eustis, FL

Logan, UT

Douglasville, GA

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Mentions for Peter Guoqing Yan

Career records & work history

Medicine Doctors

Peter Yan Photo 1

Peter Zhao Yan

Peter Yan resumes & CV records

Resumes

Peter Yan Photo 41

Technical Program And Project Manager And Cotr

Location:
Washington, DC
Industry:
Information Technology And Services
Work:
Saic Mar 2003 - Jul 2007
Chief Software and Solution Architect
National Cancer Institute (Nci) Mar 2003 - Jul 2007
Technical Program and Project Manager and Cotr
Saic 1997 - 2005
Chief Technology Officer
Education:
Shanghai Jiao Tong University Mar 1985
Master of Science, Masters
Shanghai Jiao Tong University Sep 1982
Bachelors, Bachelor of Science
Skills:
Life Sciences, Bioinformatics, Data Mining, Clinical, Software Project Management, R&D, Program Management, Integration, Informatics, Biotechnology, Healthcare, Clinical Research, Clinical Trials, Data Analysis, Soa, Agile, It Management, Knowledge Management, Process Improvement, Healthcare It, Databases, It Strategy, Architecture, Enterprise Architecture, Hl7, Data Management, Data Warehousing, Process Engineering, Sql, Sdlc, Xml, Java, Requirements Analysis, Software Development, Software Engineering, Process Development, Statistics, Business Intelligence, Business Analysis, Product Management, Validation, Ms Project, Testing, Quality Assurance, Hipaa, Pharmaceuticals, Pmp, Sas, Ctms, Edc
Interests:
Snomed
Cdisc
Bio It In Healthcare/Clinical Care
Umls
Clinical Science
Clinical Research
Model
Hl7
Irb/Plt
Hippa
See 10
21 Part 11 Std
Gcp
Ich Security
Life Science Including Clinical Care
Pacs/Ris
Medra
Bridg
Ctms/Cdms
Hl7 Patient Functional Profile
Fisma
Crf
Dicom
Cpt
Cpoe
Emr/Ehr/Phr
Cdisc/Sdtm/Odm
See Less
Glp
Lims
His/Ed
Icd 9/10
Healthcare Domain and Technical Areas
Languages:
Mandarin
Japanese
Peter Yan Photo 42

Peter Yan

Peter Yan Photo 43

Peter Yan

Peter Yan Photo 44

Infosec/Mis/Project Professional

Location:
Victoria, British Columbia, Canada
Industry:
Computer & Network Security
Work:
HPAS 2008 - 2011
MIS/Project Manager
Education:
McGill University 1978 - 2011
MBA, B.SC, B.Maths, Information System Management
Peter Yan Photo 45

Senior Staff Engineer, Interconnect Specialist At Huawei Technologies

Position:
Senior Staff Engineer, Interconnect Specialist at Huawei Technologies
Location:
Plano, Texas
Industry:
Semiconductors
Work:
Huawei Technologies - Plano, Texas since Aug 2010
Senior Staff Engineer, Interconnect Specialist
Broadcom 2009 - Aug 2011
Architecture
Huawei Technologies 2009 - 2009
Systems Architect
Freescale Semiconductor Dec 2007 - Nov 2008
Systems Architect, Business Development and Strategy Group
Freescale Semiconductor Nov 2006 - Dec 2007
Systems Architect, Packet Systems Group
Erlang Technology Jun 2003 - Oct 2006
Chief Technology Officer
Erlang Technology Sep 1999 - Jun 2003
Vice President of Engineering
Minmax Technologies Sep 1997 - Sep 1999
Engineering Manager
Education:
Washington University in St. Louis 1990 - 1997
D.Sc. (PhD), Electrical Engineering
Washington University in St. Louis 1988 - 1990
MS EE, Electrical Engineering
Washington University in St. Louis 1984 - 1988
BS EE, Electrical Engineering
Washington University in St. Louis 1984 - 1988
BS CS, Computer Science
Peter Yan Photo 46

Peter Yan

Location:
United States

Publications & IP owners

Us Patents

Noise Reducing Lighting Devices

US Patent:
2019029, Sep 26, 2019
Filed:
Mar 23, 2018
Appl. No.:
15/933523
Inventors:
- Conyers GA, US
Gregory Malone - Sterling VA, US
Peter Yi Yan Ngai - Alamo CA, US
David P. Ramer - Reston VA, US
Rashmi Kumar Rogers - Herndon VA, US
International Classification:
G10K 11/162
F21V 8/00
Abstract:
Lighting devices are disclosed. One lighting device includes a housing, a light source, and a panel. The light source is mounted within the housing and configured to emit light sufficient for general illumination of an area. The panel is supported by the housing at a location to receive light from the light source at one or more light input surfaces of the panel and output the received light from the light source via a light output surface of the panel facing the area. The light propagates within material of the panel from the one or more light input surfaces to the light output surface. The light output surface of the panel comprises a noise reduction structure.

Processing Units Having Triangular Load Protocol

US Patent:
2018032, Nov 8, 2018
Filed:
May 4, 2017
Appl. No.:
15/586937
Inventors:
- Plano TX, US
Sushma Wokhlu - Frisco TX, US
Peter Yan - Frisco TX, US
Ashish Rai Shrivastava - Plano TX, US
Tong Sun - Allen TX, US
Lee Dobson McFearin - Plano TX, US
Assignee:
Futurewei Technologies, Inc. - Plano TX
International Classification:
G06F 9/30
G06F 3/06
G06F 9/38
Abstract:
Technology for providing data to a processing unit is disclosed. A computer processor may be divided into a master processing unit and consumer processing units. The master processing unit at least partially decodes a machine instruction and determines whether data is needed to execute the machine instruction. The master processing unit sends a request to memory for the data. The request may indicate that the data is to be sent from the memory to a consumer processing unit. The data sent by the memory in response to the request may be stored in local read storage that is close to the consumer processing unit for fast access. The master processing unit may also provide the machine instruction to the consumer processing unit. The consumer processing unit may access the data from the local read storage and execute the machine instruction based on the accessed data.

Advance Cache Allocator

US Patent:
2017003, Feb 2, 2017
Filed:
Jul 28, 2015
Appl. No.:
14/811436
Inventors:
- Plano TX, US
Lee McFearin - Plano TX, US
Alan Gatherer - Richardson TX, US
Ashish Shrivastava - Plano TX, US
Peter Yifey Yan - Frisco TX, US
International Classification:
G06F 12/08
Abstract:
Systems and techniques for advance cache allocation are described. A described technique includes selecting a job from a plurality of jobs; selecting a processor core from a plurality of processor cores to execute the selected job; receiving a message which describes future memory accesses that will be generated by the selected job; generating a memory burst request based on the message; performing the memory burst request to load data from a memory to at least a dedicated portion of a cache, the cache corresponding to the selected processor core; and starting the selected job on the selected processor core. The technique can include performing an action indicated by a send message to write one or more values from another dedicated portion of the cache to the memory.

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