Reed D Vilhauer, Age 4720879 Yoncalla Ct, Portland, OR 97229

Reed Vilhauer Phones & Addresses

20879 Yoncalla Ct, Portland, OR 97229 (503) 645-1565

5480 NW Pondosa Dr, Portland, OR 97229 (503) 645-1565

San Luis Obispo, CA

2515 Overlook Dr, Hillsboro, OR 97124 (503) 617-6273

2681 Palazza Way, Hillsboro, OR 97124 (503) 466-5155

Beaverton, OR

Encinitas, CA

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Position: Professional/Technical

Mentions for Reed D Vilhauer

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Resumes

Reed Vilhauer Photo 10

Reed Vilhauer

Location:
Portland, Oregon Area
Industry:
Computer Hardware
Reed Vilhauer Photo 11

Reed Vilhauer

Publications & IP owners

Us Patents

Method And Apparatus For Managing Charging Current

US Patent:
8638072, Jan 28, 2014
Filed:
Apr 1, 2011
Appl. No.:
13/078216
Inventors:
Reed D. Vilhauer - Portland OR, US
Paul S. Durley - Portland OR, US
Darren S. Crews - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H02J 7/04
H02J 7/16
US Classification:
320162
Abstract:
An apparatus may comprise first circuitry arranged to draw current from a charging source at multiple current levels and second circuitry arranged to determine a charging current capacity of the charging source using the first circuitry.

Mac Coordination Architecture For Multi-Ratio Coexistence And A Method For Connecting Over Sideband Channels

US Patent:
2008024, Oct 2, 2008
Filed:
Mar 29, 2007
Appl. No.:
11/731540
Inventors:
Xingang Guo - Portland OR, US
Changwen Liu - Portland OR, US
Srikant Kuppa - Richfiled OH, US
Niklas Linkewitsch - Evessen, DE
Reed D. Vilhauer - Portland OR, US
International Classification:
H04Q 7/00
US Classification:
370328
Abstract:
A wireless device with a multi-radio platform includes a scheduling coordinator connected by a control bus to enable the radios to share frequency spectrum by operating during time slots requested by the radios, avoid collisions, mitigate interference and control shared hardware components.

Battery Voltage Measurement

US Patent:
2012025, Oct 4, 2012
Filed:
Apr 1, 2011
Appl. No.:
13/078325
Inventors:
Reed D. VILHAUER - Portland OR, US
Peter T. Li - Portland OR, US
Darren S. Crews - Portland OR, US
International Classification:
G06F 19/00
G01N 27/416
US Classification:
702 63, 324433
Abstract:
An apparatus is provided that includes a first circuit to determine when a battery current falls below a threshold, a second circuit to measure a battery voltage and current in response to the first circuit determining that the battery current falls below the threshold, and a third circuit to store the measured battery voltage and current.

Power Control Manager And Method

US Patent:
2012025, Oct 4, 2012
Filed:
Mar 31, 2011
Appl. No.:
13/076800
Inventors:
Reed D. VILHAUER - Portland OR, US
Darren S. Crews - Portland OR, US
Paul S. Durley - Portland OR, US
Kevin R. Mullen - Portland OR, US
International Classification:
G06F 1/26
US Classification:
713300
Abstract:
A power control manager includes a processor to compute available power from a power source and a comparator to compare the available power to an amount of power to concurrently operate a plurality of sub-systems of an electronic device at full or a predetermined power. The processor generates one or more control signals in response to a decision signal output from the comparator. The control signals may indicate that a maximum power setting is to be set for a first sub-system and a reduced non-zero power setting is to be set for a second sub-system of the plurality of sub-systems. The sub-systems may be different sub-systems of a smartphone or another electronic device.

Maintaining Operational Stability On A System On A Chip

US Patent:
2013028, Oct 24, 2013
Filed:
Sep 30, 2011
Appl. No.:
13/976019
Inventors:
Reed D. Vilhauer - Portland OR, US
William T. Glennan - Folsom CA, US
International Classification:
G06F 1/28
US Classification:
713340
Abstract:
Various embodiments are directed to maintaining operational stability for a system on a chip (SOC). A power management integrated circuit (PMIC) includes comparator circuits operative to monitor a current level on a power supply rail of the SOC. An interrupt management component may create an interrupt when the monitored current level crosses the threshold setting. The interrupt may indicate whether the current level has crossed the threshold setting into or out of excessive current levels. A microcontroller on the SOC coupled with the PMIC via a low latency interrupt channel over a communication interface may receive and interpret the interrupt. The microcontroller may be operative to change an operating point of one or more components on the SOC in response to the interrupt to alleviate an overcurrent situation.

Device Under Test Board With Offset Connection To Host Board

US Patent:
2021001, Jan 14, 2021
Filed:
Sep 25, 2020
Appl. No.:
17/033531
Inventors:
Keith Lyle Spencer - Boise ID, US
Nicholas James Rally - San Mateo CA, US
Victor Raúl Maruri - Mountain View CA, US
Reed D. Vilhauer - Portland OR, US
Brendan Rankin - Palo Alto CA, US
Elizabeth Heidi Poche - San Jose CA, US
Marcus Negron - Santa Cruz CA, US
International Classification:
H01R 12/73
H01R 12/72
G01R 31/28
Abstract:
The present disclosure relates to a circuit board that includes a first edge connector configured to communicatively couple the circuit board to a first connector of a second circuit board. The first edge connector extends from a side of the circuit board a first length. The circuit board also includes a second edge connector configured to communicatively couple the circuit board to a second connector of the second circuit board. The second edge connector extends from the side of the circuit board a second length that is different than the first length.

Apparatuses To Resolve Roles For Dual Role Serial Bus Devices

US Patent:
2018006, Mar 1, 2018
Filed:
Aug 31, 2016
Appl. No.:
15/253336
Inventors:
- Santa Clara CA, US
REED D. VILHAUER - Portland OR, US
International Classification:
G06F 13/40
G06F 13/42
Abstract:
Methods and apparatuses relating to resolving roles for dual role serial bus devices are described. In one embodiment, an apparatus includes a serial bus receptacle to receive a serial bus plug of a device, a power supply electrically coupled to the serial bus receptacle, a multiple role toggling circuit to toggle the power supply between a power source role and a power sink role, wherein the device comprises a second power supply to toggle between a power source role and a power sink role, and a randomizer circuit to cause a plurality of different, toggling duty cycles and/or a plurality of different, toggling frequencies to be applied to the multiple role toggling circuit.

Powering Up A Wireless Power Receiving Device

US Patent:
2017009, Mar 30, 2017
Filed:
Sep 25, 2015
Appl. No.:
14/866617
Inventors:
- Santa Clara CA, US
Shahar Porat - Geva Carmel, IL
Zeev Oster - Modiin, IL
Siva Ramakrishnan - Beaverton OR, US
Reed D. Vilhauer - Portland OR, US
Brian A. Leete - Beaverton OR, US
Yuval Bachrach - Haifa, IL
Assignee:
INTEL IP CORPORATION - Santa Clara CA
International Classification:
G06F 1/26
G06F 1/32
H02J 5/00
Abstract:
Techniques for powering up a wireless power receiving device are described herein. An example computing device includes a power receiving unit to wirelessly receive power from a power transmitting unit. The platform hardware includes a System on a Chip (SoC), a multicomm device, and a power sequence manager. The multicomm device is for wireless communication with two or more communication standards. One of the communication standards is used as a side channel for communicating with the power transmitting unit. The power sequence manager component manages activation of platform components of the platform hardware during a low battery cold boot condition. Upon detecting wireless power, the multicomm device is configured to automatically activate and the power sequence manager component is to suppress activation of other platform components of the platform hardware.

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