Richard D Hofmann70 Essex St APT 1, Jersey City, NJ 07302

7167971, Jan 23, 2007

Jun 30, 2004

10/881146

Sameh W. Asaad - Briarcliff Manor NY, US
Richard Gerard Hofmann - Cary NC, US

International Business Machines Corporation - Armonk NY

G06F 9/30
G06F 9/00

712 34, 712 37

A method for adaptive runtime reconfiguration of a co-processor instruction set, in a computer system with at least a main processor communicatively connected to at least one reconfigurable co-processor, includes the steps of configuring the co-processor to implement an instruction set comprising one or more co-processor instructions, issuing a co-processor instruction to the co-processor, and determining whether the instruction is implemented in the co-processor. For an instruction not implemented in the co-processor instruction set, raising a stall signal to delay the main processor, determining whether there is enough space in the co-processor for the non-implemented instruction, and if there is enough space for said instruction, reconfiguring the instruction set of the co-processor by adding the non-implemented instruction to the co-processor instruction set. The stall signal is cleared and the instruction is executed.

7523449, Apr 21, 2009

Aug 23, 2006

11/508714

Sameh W. Asaad - Briarcliff Manor NY, US
Richard Gerard Hofmann - Cary NC, US

International Business Machines Corporation - Armonk NY

G06F 9/45
G06F 9/44
G06F 15/00
G06F 7/38
G06F 12/00

717161, 717121, 712 34, 712225, 710340

A method for adaptive runtime reconfiguration of a co-processor instruction set, in a computer system with at least a main processor communicatively connected to at least one reconfigurable co-processor, includes the steps of configuring the co-processor to implement an instruction set comprising one or more co-processor instructions, issuing a co-processor instruction to the co-processor, and determining whether the instruction is implemented in the co-processor. For an instruction not implemented in the co-processor instruction set, raising a stall signal to delay the main processor, determining whether there is enough space in the co-processor for the non-implemented instruction, and if there is enough space for said instruction, reconfiguring the instruction set of the co-processor by adding the non-implemented instruction to the co-processor instruction set. The stall signal is cleared and the instruction is executed.

8108838, Jan 31, 2012

May 15, 2008

12/121542

Sameh W. Asaad - Briarcliff Manor NY, US
Richard Gerard Hofmann - Cary NC, US

International Business Machines Corporation - Armonk NY

G06F 9/44
G06F 9/445
G06F 15/00
G06F 3/00

717121, 717102, 717149, 717151, 717159, 712153, 712154, 712225, 710 10

A method for adaptive runtime reconfiguration of a co-processor instruction set, in a computer system with at least a main processor communicatively connected to at least one reconfigurable co-processor, includes the steps of configuring the co-processor to implement an instruction set comprising one or more co-processor instructions, issuing a co-processor instruction to the co-processor, and determining whether the instruction is implemented in the co-processor. For an instruction not implemented in the co-processor instruction set, raising a stall signal to delay the main processor, determining whether there is enough space in the co-processor for the non-implemented instruction, and if there is enough space for said instruction, reconfiguring the instruction set of the co-processor by adding the non-implemented instruction to the co-processor instruction set. The stall signal is cleared and the instruction is executed.