Robert G Lindstedt Deceased2600 SW 75Th Ter, Portland, OR 97225

6771410, Aug 3, 2004

Jun 18, 2003

10/465355

Robert Lindstedt - Portland OR
Harry A. Atwater - South Pasadena CA
Maria Giorgi - Sherwood OR
Robert J. Walters - Pasadena CA
Julie D. Casperson - Santa Monica CA
Pieter G. Kik - Pasadena CA

Intel Corporation - Santa Clara CA

G02F 103

359248, 359245, 385122

A method and apparatus for modulating light with an array of nanocrystals. First photons are directed onto an array of nanocrystals and at least a portion of the first photons ate directed by the array of nanocrystals. In one embodiment, the array of nanocrystals emit second photons. A wavelength of the second photons is modulated responsive to a signal. In one embodiment, dopants are formed proximate to the array of nanocrystals and energy from the absorbed portion of the first photons is coupled to the dopants to cause the to emit third photons. An intensity of the third photons is modulated responsive to a signal.

7121474, Oct 17, 2006

Jun 18, 2003

10/465354

George I. Bourianoff - Austin TX, US
Robert Lindstedt - Portland OR, US
Harry A. Atwater - South Pasadena CA, US
Maria Giorgi - Sherwood OR, US
Robert J. Walters - Pasadena CA, US
Julie D. Casperson - Santa Monica CA, US
Pieter G. Kik - Pasadena CA, US

Intel Corporation - Santa Clara CA

G06K 19/06

235494

A memory device. The memory device includes a substrate and an array of nanocrystals formed proximate to the substrate. The array of nanocrystals is electrically insulated to hold charge carriers therein. A presence of charge carriers within the array of nanocrystals represents a first logic state of the memory device. An absence of the charge carriers within the array of nanocrystals represents a second logic state of the memory device. The presence and the absence of the charge carriers is determinable via directing a beam of photons onto the array of nanocrystals and sensing an optical response.

7344897, Mar 18, 2008

May 4, 2005

11/124497

Daniel C. Diana - Portland OR, US
Carolyn R. Duran - Portland OR, US
Robert C. Lindstedt - Portland OR, US
Marian E. Silberstein - Gaston OR, US

Intel Corporation - Santa Clara CA

H01L 21/00

438 3, 438253, 438623, 438624, 438669

A ferroelectric polymer memory device and its method of formation are disclosed. In accordance with one embodiment, lower electrode memory device portions are formed using a damascene patterning process and upper electrode memory device portions are formed using a subtractive patterning process.

5242864, Sep 7, 1993

Jun 5, 1992

7/893765

Maxine Fassberg - Beaverton OR
Melton C. Bost - Hillsboro OR
Krishnamurthy Murali - Portland OR
Peter K. Charvat - Portland OR
Lynn A. Price - Portland OR
Robert C. Lindstedt - Portland OR

Intel Corporation - Santa Clara CA

H01L 21469

437228

A process for forming a protective polyimide layer over a semiconductor substrate includes the steps of curing a deposited polyamic acid layer at a temperature which is sufficient to reduce the etch rate of the acid layer when subsequently exposed to a developer. After formation of a photoresist masking layer over the polyamic acid, the substrate is exposed to a developer to define a plurality of bonding pad openings therein. The developer permeates into the acid layer to form a salt in the regions beneath the openings. Subsequent hardbaking imidizes the polyamic acid, but not the salt regions. Removing the photoresist layer also develops the polyimide which removes the salt regions to expose the underlying bonding pads.