Career records & work history
License Records
Robert Jeffrey Pintar
Address:
4018 E Walters Ln, Spokane, WA 99223
Licenses:
License #: A2531260
Category: Airmen
Category: Airmen
Robert PintarSpokane, WA
Robert Pintar Phones & Addresses
Spokane, WA
Mentions for Robert Pintar
Robert Pintar resumes & CV records
Resumes
Senior Software Engineer
Position:
Senior Software Engineer at Ciena
Location:
Spokane, Washington Area
Industry:
Computer Networking
Work:
Ciena
since Nov 2010
Senior Software Engineer HP/Agilent Technologies 1986 - Oct 2010
R&D Engineer Agilent Technologies Jan 1986 - Oct 2010
Software Engineer
Senior Software Engineer HP/Agilent Technologies 1986 - Oct 2010
R&D Engineer Agilent Technologies Jan 1986 - Oct 2010
Software Engineer
Education:
California State University-Chico 1994 - 1997
MSCS, Computer Science University of Idaho 1983 - 1986
BSEE, Electrical Engineering Boise State University 1981 - 1983
MSCS, Computer Science University of Idaho 1983 - 1986
BSEE, Electrical Engineering Boise State University 1981 - 1983
Skills:
Firmware, Embedded Systems, Product Management, Embedded Software, VxWorks, RF, Wireless, Test Equipment, RTOS
Senior Software Engineer
Location:
4018 east Walters Ln, Spokane, WA 99223
Industry:
Computer Networking
Work:
Caldera Development
Senior Software Engineer Ciena
Software Engineering Manager at Ciena Ciena Nov 2010 - May 2016
Senior Software Engineer Hp/Agilent Technologies 1986 - Oct 2010
R and D Engineer Agilent Technologies Jan 1986 - Oct 2010
Software Engineer
Senior Software Engineer Ciena
Software Engineering Manager at Ciena Ciena Nov 2010 - May 2016
Senior Software Engineer Hp/Agilent Technologies 1986 - Oct 2010
R and D Engineer Agilent Technologies Jan 1986 - Oct 2010
Software Engineer
Education:
California State University, Chico 1994 - 1997
Master of Science In Computer Science, Masters, Computer Science University of Idaho 1983 - 1986
Bachelors, Bachelor of Science In Electrical Engineering, Electrical Engineering Boise State University 1981 - 1983
Chaminade College Prep
Chaminade College Preparatory School
Chaminade College Preparatory School (Missouri)
Pierce Community College
Cal State University, Northridge
California State University, Northridge
Master of Science In Computer Science, Masters, Computer Science University of Idaho 1983 - 1986
Bachelors, Bachelor of Science In Electrical Engineering, Electrical Engineering Boise State University 1981 - 1983
Chaminade College Prep
Chaminade College Preparatory School
Chaminade College Preparatory School (Missouri)
Pierce Community College
Cal State University, Northridge
California State University, Northridge
Skills:
Firmware, Embedded Systems, Product Management, Embedded Software, Vxworks, Rf, Wireless, Test Equipment, Rtos
Robert Pintar
Publications & IP owners
Us Patents
Profile And Queue-Based Wear Leveling Of Memory Devices
US Patent:
2021024, Aug 12, 2021
Filed:
Feb 10, 2020
Appl. No.:
16/786029
Inventors:
- Boise ID, US
Katie Blomster Park - Liberty Lake WA, US
Robert J. Pintar - Spokane WA, US
Gary A. Johnson - Spokane Valley WA, US
Katie Blomster Park - Liberty Lake WA, US
Robert J. Pintar - Spokane WA, US
Gary A. Johnson - Spokane Valley WA, US
International Classification:
G06F 12/02
Abstract:
A method is described that includes receiving a write request with user data and a logical address and select a next address queue from a plurality of next address queues based on a reciprocal relationship between short-term usage information associated with the logical address and a set of characteristics of the selected next address queue. Each next address queue in the plurality of next address queues stores physical addresses that are designated to be used for fulfilling write requests. Further, a next physical address is removed from the selected next address queue and the user data of the write request is written to the next physical address in a memory device.
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