Robert F Sproull, Age 77352 Chesterfield Rd, Leeds, MA 01053

6360288, Mar 19, 2002

Oct 17, 1997

08/953767

Ivan E. Sutherland - Santa Monica CA
William S. Coates - Redwood City CA
Charles E. Molnar - late of Sunnyvale CA
Robert F. Sproull - Newton MA

Sun Microsystems, Inc. - Palo Alto CA

G06F 1300

710100, 710101, 712200, 712219, 370351

A computer system is described in which control of the flow of data items in one pipeline is achieved using the values of control elements in another pipeline. Typically, each pipeline includes elements known as âplacesâ and âpaths,â and the pipelines have special connections between them by which the data present in a place in a first pipeline can be used to control the disposition of data in the second pipeline. For example, the first pipeline can control the second pipeline to enable the addition, deletion, or steering of data items in the second pipeline.

8117443, Feb 14, 2012

Oct 5, 2005

11/243892

James H. Waldo - Dracut MA, US
Timothy Blackman - Arlington MA, US
Robert Sproull - Newton MA, US

Oracle America, Inc. - Redwood City CA

H04L 29/06

713167

Universal Unique Identifiers (UUIDs) are generated using a variety of algorithms and these algorithms are themselves encoded into the UUID. Each UUID includes two parts: a first part that is an identifier, which is unique to the second part. The second part identifies the algorithm that was used to generate the identifier. Thus, the uniqueness of the identifier is based on how the identifier was created not the entity that created it. The identity of two UUIDs is determined by comparing both the generator algorithm ID and the relative ID.

2007022, Sep 27, 2007

Mar 21, 2006

11/385164

James Waldo - Dracut MA, US
Timothy Blackman - Arlington MA, US
Daniel Ellard - Belmont MA, US
Robert Sproull - Newton MA, US
Jane Loizeaux - Lowell MA, US
Michael Warres - Cambridge MA, US

Sun Microsystems, Inc. - Santa Clara CA

G06F 9/46

719330000

Location-independent references include a live reference containing a location of a remote object and a universally unique identifier (UUID) which provides a unique global reference to that remote object. If a method call to the remote object using the live reference fails, the UUID is used to obtain a new reference to the remote object and the new reference is then used to make another method call. A new reference can be obtained from an identifier directory that contains a mapping between UUIDs and location-independent references. When a remote object is first created, or when a remote object is moved from one location to another, the remote object registers with any and all such directories that it can find in its environment. These registrations are leased; that is, if they are not occasionally refreshed by the remote object which registered them, they are dropped from the directory.

5572690, Nov 5, 1996

Jun 6, 1995

8/468884

Charles E. Molnar - Webster Groves MO
Ivan E. Sutherland - Santa Monica CA
Robert F. Sproull - Newton MA
Ian W. Jones - Saratoga CA

Sun Microsystems, Inc. - Mountain View CA

G06F 700

395376

A counterflow computing pipeline including a series of similar stages is disclosed. In the basic form of the pipeline, the stages are arranged in a linear fashion and each stage in the pipeline communicates with its two adjacent stages. The flow of data elements in the pipeline is bi-directional. A first data stream of data elements flows in a first direction from stage to stage in the pipeline. A second data stream of data elements flows from stage to stage in the pipeline in a second direction counter to the first direction. Circuitry at each stage is provided so that every data element flowing in the first direction meets each and every data element that it passes flowing in the second direction. According to various embodiments of the invention, when two data elements meet at a stage, circuitry may be provided to compare the data elements, copy data from one data element to the other, or otherwise, cause the data elements to interact. The counterflow pipeline may be either synchronous or asynchronous, and may be used for a variety of applications in signal processing, associative memory, and computer architectures.

6038646, Mar 14, 2000

Jan 23, 1998

9/012882

Robert F. Sproull - Newton MA

Sun Microsystems, Inc. - Palo Alto CA

G06F 1200

711158

A memory interface is provided between a processor and a memory subsystem which is capable of multiple concurrent transactions or accesses. The interface between the processor and the memory carries read and write operations as well as "barrier" operations, where a barrier operation signals the non-reorderability of operations. In one variation, the memory interface is an interface to one or more memory mapped input/output (I/O) devices or computational devices.

5600848, Feb 4, 1997

Jun 7, 1995

8/477533

Robert F. Sproull - Newton MA
Ivan E. Sutherland - Santa Monica CA

Sun Microsystems, Inc. - Mountain View CA

G06F 1300

395800

A general purpose computer capable of executing instructions of the type commonly found in multiple-address register-oriented instruction sets such as the SPARC instruction set is built from a counterflow pipeline. Communication in the pipeline flows both ways between adjacent stages and different stages in the pipeline are able to perform different instructions. Instructions flow through the pipeline in one direction, ("up") and the answers computed by previous instructions, called "results," flow in the other direction, ("down"). Comparison circuits in each stage of the pipeline permit instructions to select and copy the data values they need from the downward flowing stream of previously computed results. The comparison circuits also remove from the downward flowing stream previously computed results that would be rendered obsolete by execution of the present instruction.

5943491, Aug 24, 1999

Oct 20, 1997

8/954251

Ivan E. Sutherland - Santa Monica CA
Robert F. Sproull - Newton MA
William S. Coates - Redwood City CA

Sun Microsystems, Inc. - Palo Alto CA

G06F 938

395553

In certain systems where a series of stages are employed, it is desirable to control the action of a stage without possibility of interference form adjacent stages. A circuit of linked mutual exclusion elements is described which renders inactive the stages adjacent to an active stage, or inhibits action in a stage if any of its neighbors is active. This ensures that the stages adjacent to an active stage remain inactive, thereby avoiding problems associated with input events changing while an adjacent stage is active.

5682493, Oct 28, 1997

Aug 26, 1995

8/520281

Robert Yung - Fremont CA
Robert F. Sproull - Newton MA

Sun Microsystems, Inc. - Mountain View CA

G06F 938

395393

A counterflow pipeline having a scoreboard table and a register file is disclosed. In the counterflow pipeline, information flows in two directions. Instructions flow up the pipeline during execution. The results from previous instructions flow down the same pipeline. As an instruction meets a result that is needed by that instruction, that result is garnered. The scoreboard table maintains a record of the registers values that are being recomputed in the counterflow pipeline at any given point in time. When a new instruction enters the counterflow pipeline, the register values it needs are compared to the record of register values being recomputed or otherwise stored in the scoreboard table. If a match occurs, the source value is not fetched from the register file. Rather, the needed source value is garnered in the counter flow pipeline.