Roger Lee Shelton, Age 45Chatsworth, CA

6636944, Oct 21, 2003

Apr 24, 1997

08/850660

Bruce Michael Gilbert - Beaverton OR
Robert J. Joersz - Portland OR
Roger L. Shelton - Phoenix AZ

International Business Machines Corporation - Armonk NY

G06F 1300

711133, 711144

An associative cache and method for replacing data entries in the associative cache by marking input-output (IO) device entries with an IO state. The IO state of a data entry may be indicated by a status or state tag. When valid data entries in a cache must be replaced to make way for new data, entries marked with an IO state are replaced first. This order of replacement improves the cache hit rate by non-IO agents such as data processors by preserving their data entries in the cache. If no valid data entries in the associative cache are marked with an IO state, the method reverts to conventional replacement algorithms such as random or least-recently-used (LRU) to determine which data will be replaced.

5796994, Aug 18, 1998

Jan 30, 1997

8/792713

Peter Chambers - Phoenix AZ
Roger Lee Shelton - Phoenix AZ

VLSI Technology, Inc. - San Jose CA

G06F 104

395555

A patch mechanism for dynamic modification of the behavior of a state machine without interfering with normal operation of the state machine when modification is not required. The patch mechanism uses a programmable logic array for storing a modified transition and a modified output transition for an individual state of the state machine which is to be modified. A pair of multiplexer having inputs coupled to the state machine and inputs coupled to the programmable logic array are used for allowing the state machine to select either the current transition and the current output transition both defined by the state machine, or a modified transition and a modified output transition if a modification of the present state is required. A logic circuit coupled to the state machine and to both multiplexers will signal both multiplexers when it is valid to modify the present state to the modified transition and the modified output transition.

5825199, Oct 20, 1998

Jan 30, 1997

8/792712

Roger Shelton - Phoenix AZ
Peter Chambers - Phoenix AZ

VLSI Technology, Inc. - San Jose CA

H03K 19173

326 38

A reprogrammable state machine which allows the state flow and control outputs to be reprogrammed without requiring modification of the state machine. The reprogrammable state machine uses a reprogrammable logic unit to generate the state transitions and output transitions for each state of the reprogrammable state machine. A memory control unit is used to program the state machine reprogrammable logic unit with default settings for the state transitions and output transitions for each state of the reprogrammable state machine. The memory control unit is also used to reprogram the state machine reprogrammable logic unit with modified settings for the state transitions and output transitions for each state of the reprogrammable state machine which needs to be modified.