Shannon M Buzard, Age 67820 N Wacouta Ave, Prairie Du Chien, WI 53821

Shannon Buzard Phones & Addresses

Prairie du Chien, WI

Everett, WA

1717 S Dorsey Ln APT 1048, Tempe, AZ 85281

Chandler, AZ

19137 15Th St, Shoreline, WA 98177 (206) 801-7780

Seattle, WA

Mill Creek, WA

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Shannon M Buzard

Linkedin

Work

Company: Flipchip international Jan 1, 2010 Position: Advanced product engineer

Education

Degree: Bachelor of Science In Engineering, Bachelors, Bachelor of Science School / High School: Arizona State University 1990 to 1993 Specialities: Electrical Engineering

Skills

Semiconductors • Product Engineering • Ic • Mixed Signal • Engineering Management • Pcb Design • Semiconductor Industry • Yield • Analog • Asic • Spc • Product Management • Cmos • Soc • Failure Analysis • Debugging • Firmware • Electronics • Analog Circuit Design • Silicon

Industries

Semiconductors

Mentions for Shannon M Buzard

Shannon Buzard resumes & CV records

Resumes

Shannon Buzard Photo 10

Advanced Product Engineer

Location:
Phoenix, AZ
Industry:
Semiconductors
Work:
Flipchip International
Advanced Product Engineer
Cypress Semiconductor Corporation Apr 2002 - Sep 2009
Senior Staff Product Engineer
Andigilog 2000 - 2001
Test and Product Engineer
On Semiconductor 1997 - 2001
Program Manager, Section Manager
Freescale Semiconductor 1992 - 1997
Section Manager, Product Engineer
Education:
Arizona State University 1990 - 1993
Bachelor of Science In Engineering, Bachelors, Bachelor of Science, Electrical Engineering
Skills:
Semiconductors, Product Engineering, Ic, Mixed Signal, Engineering Management, Pcb Design, Semiconductor Industry, Yield, Analog, Asic, Spc, Product Management, Cmos, Soc, Failure Analysis, Debugging, Firmware, Electronics, Analog Circuit Design, Silicon

Publications & IP owners

Us Patents

Method For Applying A Final Metal Layer For Wafer Level Packaging And Associated Device

US Patent:
2013032, Dec 12, 2013
Filed:
Mar 7, 2013
Appl. No.:
13/789411
Inventors:
Shannon D. Buzard - Chandler AZ, US
Anthony P. Curtis - Queen Creek AZ, US
Douglas M. Scott - Phoenix AZ, US
Assignee:
FlipChip International, LLC - Phoenix AZ
International Classification:
H01L 23/485
H01L 21/768
US Classification:
257763, 438656
Abstract:
A wafer level semiconductor device and manufacturing method including providing a semiconductor device wafer substrate having a backside, applying to the backside a conductive metallization layer, and applying to the backside over the conductive metallization layer a protective metal layer of titanium, titanium alloys, nickel, nickel alloys, chromium, chromium alloys, cobalt or cobalt alloys, tungsten or tungsten alloys and palladium or palladium alloys.

Method For Applying A Final Metal Layer For Wafer Level Packaging And Associated Device

US Patent:
2015027, Sep 24, 2015
Filed:
Dec 19, 2014
Appl. No.:
14/577544
Inventors:
Guy F. Burgess - Gilbert AZ, US
Anthony P. Curtis - Queen Creek AZ, US
Douglas M. Scott - Phoenix AZ, US
Shannon D. Buzard - Chandler AZ, US
International Classification:
H01L 23/532
Abstract:
A wafer level semiconductor device and manufacturing method including providing a semiconductor device wafer substitute having a backside, applying to the backside a conductive metallization layer, and applying to the backside over the conductive metallization layer a protective metal layer of titanium, titanium alloys, nickel, nickel alloys, chromium, chromium alloys, cobalt, cobalt alloys, palladium, and palladium alloys.

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