Sherry Ye resumes & CV records
Resumes
Sherry Ye
Sherry Qianwen Ye, Age 50280 English Pl, Basking Ridge, NJ 07920
Sherry Ye Phones & Addresses
280 English Pl, Basking Ridge, NJ 07920
Davenport, FL
Brooklyn, NY
521 Andria Ave, Hillsborough, NJ 08844 (908) 431-9157
Bayside, NY
Bridgewater, NJ
Bryan, TX
North Plainfield, NJ
Bayside Hills, NY
521 Andria Ave APT 198, Hillsborough, NJ 08844 (908) 770-4507
Work
Position:
Precision Production Occupations
Education
Degree:
High school graduate or higher
Mentions for Sherry Qianwen Ye
Publications & IP owners
Us Patents
Integrated Devices On A Common Compound Semiconductor Iii-V Wafer
US Patent:
7893463, Feb 22, 2011
Filed:
May 12, 2010
Appl. No.:
12/778307
Inventors:
Paul Cooke - Port Monmouth NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Assignee:
Emcore Corporation - Albuquerque NM
International Classification:
H01L 29/66
US Classification:
257197, 257198, 257E21387, 257E27015, 257E29189
Abstract:
An integrated pair of HBT and FET transistors shares a common compound semiconductor III-V epitaxial layer. The integrated pair of transistors includes a semi-insulating substrate of a compound semiconductor III-V material, a first epitaxial structure disposed on top of the substrate, a second epitaxial structure on top of the first epitaxial structure, and a third epitaxial structure disposed on top of the second epitaxial structure. The first epitaxial structure forms a portion of the HBT transistor. A concentration profile of a first contaminant, which contributes electrical charge, decreases substantially smoothly across an interface between the semi-insulating substrate and the first epitaxial structure. In some cases, the interface is free of a second contaminant that was present, during formation of the epitaxial structures, in a chamber in which the epitaxial structures were formed.
Integrated Devices On A Common Compound Semiconductor Iii-V Wafer
US Patent:
8288797, Oct 16, 2012
Filed:
Dec 9, 2010
Appl. No.:
12/964529
Inventors:
Paul Cooke - Port Monmouth NJ, US
Richard W. Hoffman - Clinton NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Richard W. Hoffman - Clinton NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Assignee:
Emcore Corporation - Albuquerque NM
International Classification:
H01L 29/66
US Classification:
257197, 257198, 257E21387, 257E27015, 257E29189
Abstract:
A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
Integrated Devices On A Common Compound Semiconductor Iii-V Wafer
US Patent:
8309990, Nov 13, 2012
Filed:
Feb 15, 2012
Appl. No.:
13/397367
Inventors:
Paul Cooke - Port Monmouth NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Assignee:
Emcore Corporation - Albuquerque NM
International Classification:
H01L 29/66
US Classification:
257197, 257198, 257E21387, 257E27015, 257E29189
Abstract:
A III-V compound semiconductor structure comprises epitaxial structures that include an integrated pair of different types of active devices. The semiconductor structure includes a semi-insulating substrate of a compound semiconductor III-V material and a first compound semiconductor III-V epitaxial structure disposed on the substrate. A concentration profile of dopant material in the semiconductor structure decreases substantially smoothly across an interface between the substrate and the first epitaxial structure in a direction from the first epitaxial structure toward the substrate, and continues to decrease substantially smoothly from the interface with increasing depth into the substrate despite the presence of silicon or oxygen contaminant at the interface. The interface is substantially free of a second contaminant that was present, during formation of the first epitaxial structure, in a chamber in which the first epitaxial structure was formed.
Process For Manufacturing Epitaxial Wafers For Integrated Devices On A Common Compound Semiconductor Iii-V Wafer
US Patent:
2008002, Jan 31, 2008
Filed:
Jul 28, 2006
Appl. No.:
11/495811
Inventors:
Paul Cooke - Port Monmouth NJ, US
Richard W. Hoffman - Clinton NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Richard W. Hoffman - Clinton NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
International Classification:
H01L 31/00
US Classification:
257192
Abstract:
A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a second epitaxial structure on the first epitaxial structure.
Integrated Devices On A Common Compound Semiconductor Iii-V Wafer
US Patent:
2008002, Jan 31, 2008
Filed:
Jul 28, 2006
Appl. No.:
11/494969
Inventors:
Paul Cooke - Port Monmouth NJ, US
Richard W. Hoffman - Clinton NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
Richard W. Hoffman - Clinton NJ, US
Victor Labyuk - Hackettstown NJ, US
Sherry Qianwen Ye - Bridgewater NJ, US
International Classification:
H01L 21/20
US Classification:
438478
Abstract:
A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
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