Steven C BoettnerSan Jose, CA
Steven Boettner Phones & Addresses
San Jose, CA
Mentions for Steven C Boettner
Publications & IP owners
Us Patents
Direct Input/Output In A Virtual Memory System
US Patent:
4777589, Oct 11, 1988
Filed:
Jun 28, 1985
Appl. No.:
6/750578
Inventors:
Steven C. Boettner - San Jose CA
William R. Bryg - Saratoga CA
David V. James - Palo Alto CA
Tso-Kai Liu - Saratoga CA
Michael J. Mahon - San Jose CA
Terrence C. Miller - Menlo Park CA
William S. Worley - Saratoga CA
William R. Bryg - Saratoga CA
David V. James - Palo Alto CA
Tso-Kai Liu - Saratoga CA
Michael J. Mahon - San Jose CA
Terrence C. Miller - Menlo Park CA
William S. Worley - Saratoga CA
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
G06F 1206
G06F 1208
G06F 1208
US Classification:
364200
Abstract:
A virtual memory system is used to control access to I/O device address space in accordance with a preferred embodiment of the present invention. In a virtual memory system, access to pages within a processor's address space are assigned to each application program. Each I/O device is assigned two pages of address space. One page is considered to be privileged, and the other unprivileged. Each I/O device register is associated with an address in each of the two pages of its I/O device address space. Address space is global. What is meant by global is that physical memory locations map to the same virtual memory space regardless of what process is running on the processor. Access codes accompanied by a write disable bit are used to control process access to various addresses.
Explicit Instructions For Control Of Translation Lookaside Buffers
US Patent:
5060137, Oct 22, 1991
Filed:
Aug 3, 1988
Appl. No.:
7/229750
Inventors:
William R. Bryg - Saratoga CA
Michael E. Gardner - Sunnyvale CA
Steven C. Boettner - San Jose CA
Michael E. Gardner - Sunnyvale CA
Steven C. Boettner - San Jose CA
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
G06F 1210
G06F 1208
G06F 1208
US Classification:
364200
Abstract:
Explicit instructions are provided that enable software to directly control insertion of information into a translation lookaside buffer (TLB). A first pair of instructions enable information to be inserted into a data TLB and a second pair of instructions enable information to be inserted into an instruction TLB. In each of these pairs, the first instruction inserts the virtual address and the associated physical address. In response to the second instruction of each of these pairs, additional information about that physical page, such as protection information and flags, is inserted.
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