Theron L Jones, Age 571238 1900 North Rd N, White Heath, IL 61884

6343222, Jan 29, 2002

Apr 14, 1999

09/291773

Theron Jones - Apex NC

Ericsson Inc. - Research Triangle Park NC

H04B 138

455574

A power controller regulates power from a power source coupled to a power source input to a load coupled to a load output, and this power controller includes a switch and a switching controller. The switch is coupled between the power source input and the load output wherein the switch is switched on and off responsive to an input signal. The switching controller is coupled to the switch wherein the switching controller generates the input signal so that the switch is switched on and off to provide a regulated power output to the load output during active load operations and so that the switch couples the power source to the load output without switching to provide an unregulated power output during stand-by load operations. Related methods and radiotelephones are also discussed.

6441691, Aug 27, 2002

Mar 9, 2001

09/803604

Theron Jones - Apex NC
David Homol - Chandler AZ

Ericsson Inc. - Research Triangle Park NC

H03L 700

331 25, 327 12, 331156

Phase-reset circuits provide first and second frequency-divided input signals to a phase/frequency detector (PFD) used in a phase-locked loop (PLL). The phase-reset circuits receive first and second input signals, with the first input signal usually serving as a reference signal against which the PLL adjusts the second input signal. The PFD generates control signals based on the phase difference between the frequency-divided input signals. Normally, the phase-reset circuits frequency divide the first and second input signals using divisors N and M, respectively. If other circuitry detects that the PFD has missed a clock cycle in the first or second clock-divided input signals, the corresponding phase-reset circuit alters its divider so that the next clock edge on the corresponding input signal clocks through to the PFD. This causes the PFD to quickly set its affected control signal to what it would have been had the clock cycle not been missed.

7003065, Feb 21, 2006

Mar 9, 2001

09/803334

David Homol - Chandler AZ, US
Theron Jones - Apex NC, US
Nikolaus Klemmer - Apex NC, US

Ericsson Inc. - Research Triangle Park NC

H03D 3/24

375376, 375354, 375371, 375374, 331 10, 331 12, 331 16, 327 10, 327149

A cycle slip detector interfaces with a phase/frequency detector (PFD), such as might be used in a phase-locked loop circuit (PLL), and indicates when cycle slips occur in the PFD. Typically, the PFD generates output control signals as a function of the phase difference between first and second input signals, with the first input signal usually serving as a reference signal against which the PLL adjusts the second input signal. The PFD provides linear phase comparison between its input signals, provided their relative phase difference does not exceed 2π radians. If one of the two signals leads or lags the other by more than that amount, a cycle slip occurs, and the PFD responds nonlinearly. The cycle slip detector provides logic for detecting and indicating leading and lagging cycle slips as they occur in the PDF, and is typically implemented as a minimal arrangement of logic gates and flip-flops.

7843257, Nov 30, 2010

Mar 2, 2009

12/396421

Theron Jones - White Heath IL, US
Andrew Zocher - Monticello IL, US

Maxim Integrated Products, Inc. - Sunnyvale CA

H04B 1/10

327553

An example bandpass filter calibration system includes a MUX, first and second signal sources coupled to inputs of the MUX, a bandpass filter coupled to an output of the MUX, a rectification circuit including a plurality of rectifiers having a corresponding plurality of rectifier outputs coupled to an output of the bandpass filter, a summer having a plurality of inputs coupled to the plurality of rectifier outputs, a low pass filter coupled to an output of the summer, an ADC coupled to an output of the low pass filter, and a calibration processor unit coupled to an output of the ADC. The calibration processor unit controls the MUX to selectively apply the first signal source and the second signal source to the bandpass filter and calibrates the bandpass filter by a least one of increasing filter center frequency and decreasing filter center frequency of the bandpass filter.

8411799, Apr 2, 2013

Nov 13, 2009

12/618541

Theron L. Jones - White Heath IL, US
Andrew Zocher - Monticello IL, US
Lawrence Rankin Burgess - Saratoga CA, US

Maxim Integrated Products, Inc. - San Jose CA

H03D 3/00

375334, 375215, 375316, 375322, 375327, 375339

A receiver having an intermediate frequency error correction circuit includes a mixer having a source input, a local oscillator input, and an IF output, an adjustable frequency local oscillator having an output coupled to the local oscillator input of the mixer, an IF filter having an input coupled to the IF output of the mixer and an IF filtered output, where the IF filter has an IF filter frequency response, and control circuitry coupled to the local oscillator such that the frequency of the local oscillator can be varied to at least: partially correct an IF frequency error.

8624658, Jan 7, 2014

Jul 30, 2012

13/561529

Theron L. Jones - White Heath IL, US
Richard D. Davis - Champaign IL, US
James Imbornone - Methuen MA, US
Xuejin Wang - Fort Collins CO, US

Maxim Integrated Products, Inc. - San Jose CA

G01V 3/02

327355, 455323

A frequency mixer having parallel mixer cores is described that is configured to heterodyne a signal. In an implementation, the frequency mixer includes a first mixer core and a second mixer core. A first balun is connected to the first mixer core and configured to furnish a LO signal occurring in a first range of frequencies to the first mixer core. The mixer includes a second balun coupled to the second mixer core, and the second balun is configured to furnish a LO signal occurring in a second range of frequencies during a second time interval. The mixer includes a first biasing voltage source that is center tapped to the first balun and a second biasing voltage source is center tapped to the second balun to further prevent operation of the at least substantially non-operational mixer core.

5781078, Jul 14, 1998

Dec 5, 1996

8/759624

Theron L. Jones - Quincy IL

Glenayre Electronics, Inc. - Charlotte NC

H03H 701

333 12

A method and apparatus for filter enhancement in an electrical system (8) is provided. The electrical system (8) includes an input circuit (10) having a filter (14) and an output circuit (20) having a filter (24). An input conductive enclosure (12) and an output conductive enclosure (22) protect the electrical system (8) from field coupling between the input circuit (10) and the output circuit (20). A choke balun (26) is connected between the input circuit (10) and the output circuit (20) to also eliminate conductive coupling. The elimination of unwanted coupling enhances the performance of the electrical system (8) by achieving greater stopband attenuation.

5732333, Mar 24, 1998

Feb 14, 1996

8/601118

Charles Brian Cox - Quincy IL
David Kent Bonds - Quincy IL
Jay Jui-Chieh Chen - Vancouver, CA
Flaviu C. Costescu - Surrey, CA
Joel Richard Dierks - Quincy IL
Wayne Douglas Duello - Quincy IL
Thomas L. Frederick - Liberty IL
Paul A. Goud - Vancouver, CA
Derek Stephen Hilborn - Nepean, CA
Richard Johnathan Hinkle - Taylor MO
Terry Lee Hinkle - Lewistown MO
David E. Jones - Quincy IL
Theron Lee Jones - Quincy IL
Patricia Fern Kavanagh - Burnaby, CA
David W. Kroeger - Quincy IL
Robert Richard Leyendecker - Blaine WA
Vladimir Pavlovic - Vancouver, CA
Claudio Gustavo Rey - Coquitlam, CA
Ray M.R. Sewlochan - Vancouver, CA
Emre Tapucu - Burnaby, CA
Mark A. Walker - Palmyra MO

Glenayre Electronics, Inc. - Charlotte NC

H04B 104
H03F 126

455126

A linear transmitter (101) using predistortion includes a modulator (103), a predistorter (107), a digital quadrature modulator (111), an upconverter (113), a power amplifier (115), and an antenna (117). In addition, the transmitter (101) has a feedback loop including a coupler (119), a downconverter (123), a digital quadrature demodulator (125), and a trainer (131). The digital data to be transmitted is provided into the modulator (103), which converts the digital data into in-phase and quadrature component signals. The in-phase and quadrature component signals are then provided to the predistorter (107), which "predistorts" the component signals prior to amplification. The digital quadrature modulator (111) converts the component signals into a single analog signal. The upconverter (113) upconverts this signal from the predistorter (107) into the desired frequency of transmission, which is provided to the power amplifier (115) and the antenna (117) for amplification and broadcast. The coupler (119) provides a portion of the amplified signal to the analog downconverter (123), which lowers the frequency of this signal to a range that is easily processed.