Tim D Isbell, Age 7814640 Springer Ct, Saratoga, CA 95070

Tim Isbell Phones & Addresses

14640 Springer Ct, Saratoga, CA 95070 (408) 255-6831

San Jose, CA

Los Altos, CA

10372 Scenic Blvd, Cupertino, CA 95014

Santa Clara, CA

2240 Homestead Ct APT 214, Los Altos, CA 94024

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Tim Isbell

Licenses:
License #: E036274 - Expired
Category: Emergency medical services
Issued Date: Nov 6, 2009
Expiration Date: Jul 31, 2013
Type: San Diego County EMS Agency

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Tim Isbell

Location:
United States
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Tim Isbell

Location:
United States

Publications & IP owners

Us Patents

Pulse Width Modulator Circuit For Switching Regulators

US Patent:
4634892, Jan 6, 1987
Filed:
Jan 16, 1984
Appl. No.:
6/571274
Inventors:
Tim D. Isbell - San Jose CA
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03K 3017
H03K 504
H03K 700
US Classification:
307265
Abstract:
A circuit is shown for pulse width modulating the output of a voltage controlled oscillator without introducing any oscillator frequency or amplitude (slope) modulation. A summing circuit is combined with a comparator and provided with inputs that accommodate differential sum/difference inputs, an error input and a ramp input from the oscillator or other source. The ramp and error signals are combined differentially to pulse width modulate the comparator output and pulse width modulation can also be achieved via the sum/difference inputs in a differential relationship.

Instrumentation Amplifier With Extended Common Mode Range

US Patent:
4232271, Nov 4, 1980
Filed:
Feb 5, 1979
Appl. No.:
6/009639
Inventors:
Robert C. Dobkin - Hillsborough CA
Tim D. Isbell - San Jose CA
Bernard D. Miller - Santa Clara CA
Lawrence R. Sample - San Jose CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 345
US Classification:
330258
Abstract:
In an instrumentation amplifier a differential input is provided, one side of which is connected to an instrument ground that is remote from the amplifier power supply ground. The remote ground can, under some conditions, operate at a potential that is outside the potential span of the amplifier power supply. Such common mode potentials are difficult to cope with when the difference exceeds about 0. 6 volt. The circuit employs a pair of transistors biased to equal current densities. The emitters constitute the circuit input terminals. Means are provided to adjust the transistor collector to base voltage to establish a constant predetermined current. The transistor that is to be connected to the remotely grounded input has a resistor coupled between emitter and base to produce a reference current. A resistor connected between the transistor bases will then assume a potential equal to the emitter potential difference. A current mirror reproduces the base resistor current at the amplifier output terminal.

Pulse Width Modulator Circuit For Switching Regulators

US Patent:
4743783, May 10, 1988
Filed:
Aug 25, 1986
Appl. No.:
7/001321
Inventors:
Tim D. Isbell - San Jose CA
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03K 522
H03B 1900
H03F 345
US Classification:
307498
Abstract:
A circuit for pulse width modulating the output of a voltage controlled oscillator without introducing any ocillator frequency or amplitude (slope) modulation. A summing circuit is combined with a comparator and provided with inputs that accommodate differential sum/difference inputs, an error input and a ramp input from the oscillator or other source. The ramp and error signals are combined differentially to pulse width modulate the comparator output and pulse width modulation can also be achieved by via the sum/difference inputs a differential relationship.

Two Stage Thermal Shutdown

US Patent:
4345218, Aug 17, 1982
Filed:
Sep 8, 1980
Appl. No.:
6/185055
Inventors:
James S. Congdon - Santa Clara CA
Tim D. Isbell - San Jose CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 304
H02H 504
US Classification:
330298
Abstract:
In an amplifier circuit the output devices are thermally coupled to a shutdown circuit. A first latch is designed to operate at a first high temperature excursion. The first latch operation acts to shut the output devices off and to invoke a second latch. The second latch operates between a low temperature and a second high temperature that is below the first high temperature. Thus, after the first latch operates, the second latch will operate to cycle between a low temperature whereupon it energizes the output devices and a high temperature at which it deenergizes the output devices. By this action, the circuit will permit only one high temperature peak after which it will cycle between a lower high temperature peak and a low temperature. This avoids repeated cycling to a high temperature that could be deleterious to the circuit devices or the package in which they are housed.

Am Stereo Receiver Logic

US Patent:
4379208, Apr 5, 1983
Filed:
Nov 13, 1980
Appl. No.:
6/206336
Inventors:
Tim D. Isbell - San Jose CA
Don R. Sauer - San Jose CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H04H 500
US Classification:
179 1GS
Abstract:
In an AM stereo radio receiver, a pilot signal is recovered from the phase modulated channel. The pilot signal is sensed by means of a bandpass filter tuned to the subaudible signal frequency and is used to operate a detector-switching amplifier combination. The switching amplifier actuates a visual indicator which shows the presence of a stereo broadcast. The receiver is provided with an electronic blend function that operates in response to the pilot signal and an excess phase signal that is present when the receiver is mistuned. OR Logic, which responds to either mistuning or a lack of stereo pilot signal, switches the receiver to monaural response. If desired, further OR Logic can include response to weak signals, in which case an improvement in signal to noise ratio is achieved.

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