Viral K Parikh, Age 45Austin, TX

Viral Parikh Phones & Addresses

Austin, TX

San Diego, CA

1509 Commerce Dr, Plano, TX 75093

Richardson, TX

Dallas, TX

Mentions for Viral K Parikh

Viral Parikh resumes & CV records

Resumes

Viral Parikh Photo 28

Senior Manufacturing Engineer

Location:
Austin, TX
Industry:
Renewables & Environment
Work:
First Solar Sep 2015 - Nov 2016
Finishing Engineer Iii
Stion Sep 2015 - Nov 2016
Senior Manufacturing Engineer - Mocvd and Cbd Processes
First Solar Jul 2011 - Aug 2015
Manufacturing Engineer Iii - Integration and Root Cause Analysis
First Solar Mar 2009 - Jun 2011
Development Engineer I - Semiconductor Deposition
Stion Mar 2007 - Mar 2009
Process Engineer - Semiconductor Deposition
Mar 2007 - Mar 2009
Senior Manufacturing Engineer
Education:
The University of Toledo 2001 - 2007
Doctorates, Doctor of Philosophy, Physics, Philosophy
Department of Technology, Savitribai Phule Pune University 1996 - 1998
Master of Science, Masters, Physics
Skills:
Thin Films, Photovoltaics, Design of Experiments, Solar Cells, Materials Science, Solar Energy, Pvd, Sputtering, Characterization, Cvd, Semiconductors, Data Analysis, Powder X Ray Diffraction, Manufacturing, R&D, Afm, Physical Vapor Deposition, Research and Development, Engineering, Jmp, Xrd, Thin Film Deposition Techniques, Chemical Vapor Deposition, Physics, Root Cause Analysis, Mocvd
Languages:
Hindi
Marathi
Gujarati
Viral Parikh Photo 29

Direct Support Professional Design Engineer

Location:
San Diego, CA
Industry:
Wireless
Work:
Cirrus Logic
Direct Support Professional Design Engineer
Qualcomm Sep 2013 - Feb 2016
Staff Engineer, Rf and A Digital Design Group
Texas Instruments May 2010 - Sep 2013
Staff Engineer, Low-Power Rf Group
Texas Instruments May 2008 - May 2010
Design Engineer
Einfochips May 2001 - Jan 2003
Asic Verification Engineer
Education:
The University of Texas at Dallas 2003 - 2008
Master of Science, Doctorates, Masters, Doctor of Philosophy, Electrical Engineering
Dharmsinh Desai University 1997 - 2001
Bachelor of Engineering, Bachelors, Communication, Electronics
Skills:
Asic, Cmos, Mixed Signal, Vhdl, Wireless, Digital Signal Processors, Matlab, Low Power Design, Timing Closure, Physical Design, Mixed Signal Ic Design, Application Specific Integrated Circuits, System Specification, Hardware Specification
Interests:
Education
Environment
Hiking
Science and Technology
Tennis
Mountains
Health
Languages:
English
Gujarati
Hindi
Viral Parikh Photo 30

Viral Parikh

Publications & IP owners

Us Patents

Multi-Mode Crystal Oscillators

US Patent:
2015005, Feb 26, 2015
Filed:
Aug 19, 2014
Appl. No.:
14/463658
Inventors:
- Dallas TX, US
Viral Parikh - San Diego CA, US
Ryan Smith - Sachse TX, US
Per Torstein Roine - Oslo, NO
International Classification:
H03L 7/02
H04B 1/40
US Classification:
455 84, 331 36 C
Abstract:
Digital control of a crystal oscillator is implemented in a manner that allows frequency accuracy to be traded off dynamically with power consumption. The oscillator transitions between a less accurate/lower power mode and a high accuracy/higher power mode smoothly without requiring any external clock source during the transition. Power consumption is optimized because the crystal oscillator provides the clock source during transitions between the power modes and no other clock source is needed for these transitions. The system can also optimize the startup time and steady state power consumption independently.

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