Zhiru Zhang, Age 44Ithaca, NY

Zhiru Zhang Phones & Addresses

Ithaca, NY

San Jose, CA

Northridge, CA

1515 Selby Ave, Los Angeles, CA 90024 (310) 474-4372

3110 Sawtelle Blvd, Los Angeles, CA 90066 (310) 390-7230

3240 Sawtelle Blvd, Los Angeles, CA 90066 (310) 390-7230

1430 Amherst Ave, Los Angeles, CA 90025 (310) 207-4187

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Mentions for Zhiru Zhang

Resumes & CV records

Resumes

Zhiru Zhang Photo 14

Zhiru Zhang

Location:
Ithaca, NY
Industry:
Higher Education
Skills:
Eda, Computer Architecture, Algorithms, Fpga, Verilog, Linux, Algorithm Design, Debugging, Tcl, Embedded Systems, Software Development, Simulations, Software Engineering, C++
Zhiru Zhang Photo 15

Zhiru Zhang

Location:
Ithaca, New York
Industry:
Higher Education
Skills:
EDA, Computer Architecture, Algorithms, FPGA, Verilog, Linux, Algorithm Design, Debugging, TCL

Publications & IP owners

Us Patents

Soft Constraints In Scheduling

US Patent:
8296710, Oct 23, 2012
Filed:
Jul 28, 2010
Appl. No.:
12/845204
Inventors:
Bin Liu - Los Angeles CA, US
Zhiru Zhang - Los Angeles CA, US
Jason Cong - Pacific Palisades CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716132, 716133, 716134, 716135
Abstract:
A method for implementing soft constraints in scheduling comprises receiving a description of circuit behavior. The description is un-timed. A scheduling solution is generated for use in scheduling the description. The scheduling solution includes scheduling variables and an objective function. The scheduling variables schedule the time of at least one operation. The objective function includes a penalty term and constraints comprising at least one hard constraint and at least one soft constraint. The constraints are created on the scheduling variables. The penalty term comprises a slack variable representing violations of the constraints. The penalty term measures the design cost of violating the soft constraint. Following generation of the scheduling solution, the description is scheduled by applying the scheduling solution to the description. Timing information of the description is provided as an output of the scheduling.

Performance Visualization System

US Patent:
7784008, Aug 24, 2010
Filed:
Jan 11, 2006
Appl. No.:
11/330931
Inventors:
Michael D. Hutton - Mountain View CA, US
David Karchmer - Los Altos CA, US
Zhiru Zhang - Los Angeles CA, US
Assignee:
Altera Corporation - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 12, 716 1, 716 11
Abstract:
A visualization displays user designs and performance information at different levels of detail. Related register bits are combined into a metaregister and displayed as a graph node. The set of paths and associated combinatorial logic between two or more metaregisters are collapsed into a metapath and displayed as a graph connection. The set of paths associated with a metapath can be selectively revealed in response to user input. Metapaths can be annotated with performance information of its associated paths, such as timing, area, and power consumption information. The annotated performance information can represent performance information of one or more paths or aggregate attributes of the set of paths. Paths associated with control signals and finite state machines can be identified and displayed as separate graph connections.

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