John D Dillon, Age 49125 Near Ct, Walnut Creek, CA 94596

John Dillon Phones & Addresses

125 Near Ct, Walnut Creek, CA 94596

Concord, CA

West Hollywood, CA

Marina del Rey, CA

2960 Sombrero Cir, San Ramon, CA 94583

Rio Vista, CA

Laton, CA

Danville, CA

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Mentions for John D Dillon

Career records & work history

Lawyers & Attorneys

John Dillon Photo 1

John Dillon - Lawyer

Office:
Crowe Dillon Robinson
Specialties:
Corporate Law
ISLN:
907848675
Admitted:
1971
University:
Dalhousie University, B.Com.
Law School:
Dalhousie University, LL.B.
John Dillon Photo 2

John Dillon - Lawyer

Specialties:
Criminal Defense, Criminal Defense
ISLN:
924376800
Admitted:
1988
John Dillon Photo 3

John Dillon - Lawyer

Specialties:
Administrative Law, Labor and Employment, Federal Contracts
ISLN:
919875515
Admitted:
2006
University:
University of Miami, B.A., 2002; University of Miami, B.A., 2002
Law School:
University of Cincinnati College of Law, J.D., 2006
John Dillon Photo 4

John Dillon - Lawyer

ISLN:
1000762302
Admitted:
2016
John Dillon Photo 5

John Dillon - Lawyer

Office:
Dillon Law Group, LLC
Specialties:
Complex Insurance Coverage, Environmental, Litigation/Defense, Trusts/Estates/Wills, Business
ISLN:
907848699
Admitted:
1980
University:
Kalamazoo College, B.A., 1977
Law School:
Washington College of Law, American University, J.D., 1980
John Dillon Photo 6

John Dillon - Lawyer

Office:
Kramer Levin Naftalis & Frankel LLP
Specialties:
Intellectual Property, International Law, Litigation
ISLN:
922237585
Admitted:
2012
University:
Providence College, B.S., 2007
Law School:
Brooklyn Law School, J.D., 2011
John Dillon Photo 7

John Ryder Dillon - Lawyer

Office:
Law Offices of John Ryder Dillon
Specialties:
Family Law(90%), Criminal Law, Divorce
ISLN:
907848668
Admitted:
1989
University:
Harvard University, B.A.
Law School:
University of Detroit Mercy, J.D.

Medicine Doctors

John J. Dillon

Specialties:
Nephrology
Work:
Mayo Clinic
200 1 St SW, Rochester, MN 55905
(507) 284-2111 (phone)
Site
Education:
Medical School
Columbia University College of Physicians and Surgeons
Graduated: 1983
Procedures:
Dialysis Procedures, Vaccine Administration
Conditions:
Acute Renal Failure, Acute Myocardial Infarction (AMI), Acute Pancreatitis, Anemia, Arterial Thromboembolic Disease, Atherosclerosis, Atrial Fibrillation and Atrial Flutter, Bacterial Pneumonia, Calculus of the Urinary System, Cardiac Arrhythmia, Cardiomyopathy, Chronic Renal Disease, Cirrhosis, Diabetes Mellitus (DM), Disorders of Lipoid Metabolism, Diverticulitis, Endocarditis, Gastrointestinal Hemorrhage, Heart Failure, Hypertension (HTN), Infectious Liver Disease, Ischemic Heart Disease, Ischemic Stroke, Kidney Cancer, Nephrotic Syndrome, Osteoarthritis, Overweight and Obesity, Pneumonia, Septicemia, Systemic Lupus Erythematosus, Venous Embolism and Thrombosis, Ventral Hernia
Languages:
English, Spanish
Description:
Dr. Dillon graduated from the Columbia University College of Physicians and Surgeons in 1983. He works in Rochester, MN and specializes in Nephrology. Dr. Dillon is affiliated with Mayo Clinic Hospital-Rochester Methodist Campus and Saint Marys Hospital.
John Dillon Photo 8

John J Dillon

License Records

John M Dillon

Licenses:
License #: 20CC01327500 - Active
Category: Accountancy
Issued Date: Jan 10, 1984
Expiration Date: Dec 31, 2017
Type: Certified Public Accountant

John Dillon

Licenses:
License #: 55881 - Active
Category: Professional
Issued Date: Oct 28, 2013
Expiration Date: Sep 26, 2017

John W Dillon

Licenses:
License #: RS072462A - Expired
Category: Real Estate Commission
Type: Real Estate Salesperson-Standard

John M Dillon

Licenses:
License #: 20CC01327500 - Active
Category: Accountancy
Issued Date: Jan 10, 1984
Expiration Date: Dec 31, 2017
Type: Certified Public Accountant

John Dillon resumes & CV records

Resumes

John Dillon Photo 60

John Dillon - St. Louis, MO

Work:
Garlich Printing Apr 2012 to 2000
Production Temp
Metlife and Home Oct 2008 to Jul 2012
IAT Representative
Hot Topic - St. Louis, MO Nov 2011 to Apr 2012
Supervisor
Missouri State Highway Patrol Mar 2008 to Jul 2011
Driver Examiner Clerk Typist
Schnucks Markets Jul 2007 to Oct 2008
Bagger, Cashier, Stocker

Publications & IP owners

Wikipedia

John Dillon Photo 61

Merlo Partido

…John Dillon, left Ireland and emigrated to Spain. In 1807 he settled in the River Plate as a merchant and owner of a meat-curing plant. He loaned his flotilla of boats to Argentina in the war for independence with Spain. He also started the first brewery in the country. John Dillon dies in 1...
John Dillon Photo 62

St. Mary's Church (Albany New York)

… a single two-year term. In 1892, Walworth told Bishop Francis McNeirny that his failing health and increasing blindness made it impossible for him to carry on his pastoral duties alone. He continued as the church's rector; his assistant John Dillon was named parish administrator and vice re...

Us Patents

Chip Socket Assembly And Chip File Assembly For Semiconductor Chips

US Patent:
6352435, Mar 5, 2002
Filed:
Dec 20, 1999
Appl. No.:
09/468247
Inventors:
Donald V. Perino - Los Altos CA
Wayne S. Richardson - Cupertino CA
John B. Dillon - Palo Alto CA
Assignee:
Rambus, Inc. - Los Altos CA
International Classification:
H01R 1362
US Classification:
439 73, 439331, 439 91
Abstract:
A chip socket assembly provides for the mechanical and electrical coupling of edge-mountable chips to a bus of a circuit board with relative ease. An edge-mountable chip may be placed in a slot defined by a base. A clip may be attached to the base to retain the chip in the base. Alternatively, the base and the package of the chip may be configured such that the chip mates with the base in retaining the chip in the base. With the chip socket assembly, users may add, remove, or replace single chips and therefore expand the functionality of a system with the granularity of a single chip in a relatively easy manner. A chip file assembly may also be used to provide for the mechanical and electrical coupling of a plurality of edge-mountable chips to a bus of a circuit board with relative ease. Assemblies for securing horizontal chip packages are also described.

Apparatus And Method For Multilevel Signaling

US Patent:
6359931, Mar 19, 2002
Filed:
Oct 15, 1999
Appl. No.:
09/418790
Inventors:
Donald V. Perino - Los Altos CA
John B. Dillon - Palo Alto CA
Assignee:
Rambus Inc. - Los Altos CA
International Classification:
H04B 300
US Classification:
375257, 375286, 375316
Abstract:
A system for transmitting information from a source to a destination using multilevel signaling. Multiple conductors are coupled between the transmission source and the transmission destination. Multiple drivers are coupled to the conductors at the transmission source. Each driver is coupled to a pair of conductors. Multiple comparators are coupled to the conductors at the transmission destination. Each comparator is coupled to a pair of conductors. The information is encoded into a sequence of symbols in which each symbol represents a unique permutation of signal levels on the conductors. Each signal level is used at least once for each symbol. All signal levels associated with a particular symbol are transmitted over the conductors simultaneously.

Protocol For Communication With Dynamic Memory

US Patent:
6470405, Oct 22, 2002
Filed:
May 29, 2001
Appl. No.:
09/870322
Inventors:
Richard Maurice Barth - Palo Alto CA
Frederick Abbot Ware - Los Altos Hills CA
John Bradly Dillon - Palo Alto CA
Donald Charles Stark - Woodside CA
Craig Edward Hampel - San Jose CA
Matthew Murdy Griffin - Mountain View CA
Assignee:
Rambus Inc. - Los Altos CA
International Classification:
G06F 1300
US Classification:
710100, 710107
Abstract:
A system and method for performing data transfers within a computer system is provided. The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line. The system includes a memory device with control circuitry that allows no more than one memory bank powered by any given power supply line to perform sense or precharge operations.

Apparatus For Multilevel Signaling

US Patent:
6504875, Jan 7, 2003
Filed:
Oct 31, 2001
Appl. No.:
09/999812
Inventors:
Donald V. Perino - Los Altos CA
John B. Dillon - Palo Alto CA
Assignee:
Rambus Inc. - Los Altos CA
International Classification:
H04B 300
US Classification:
375257, 375286, 375316
Abstract:
A system for transmitting information from a source to a destination using multilevel signaling. Multiple conductors are coupled between the transmission source and the transmission destination. Multiple drivers are coupled to the conductors at the transmission source. Each driver is coupled to a pair of conductors. Multiple comparators are coupled to the conductors at the transmission destination. Each comparator is coupled to a pair of conductors. The information is encoded into a sequence of symbols in which each symbol represents a unique permutation of signal levels on the conductors. Each signal level is used at least once for each symbol. All signal levels associated with a particular symbol are transmitted over the conductors simultaneously.

Chip Socket Assembly And Chip File Assembly For Semiconductor Chips

US Patent:
6589059, Jul 8, 2003
Filed:
Sep 20, 2001
Appl. No.:
09/957822
Inventors:
Donald V. Perino - Los Altos CA
Wayne S. Richardson - Cupertino CA
John B. Dillon - Palo Alto CA
Assignee:
Rambus, Inc. - Los Altos CA
International Classification:
H01R 1200
US Classification:
439 73, 439331, 439 91
Abstract:
A chip socket assembly provides for the mechanical and electrical coupling of edge-mountable chips to a bus of a circuit board with relative ease. An edge-mountable chip may be placed in a slot defined by a base. A clip may be attached to the base to retain the chip in the base. Alternatively, the base and the package of the chip may be configured such that the chip mates with the base in retaining the chip in the base. With the chip socket assembly, users may add, remove, or replace single chips and therefore expand the functionality of a system with the granularity of a single chip in a relatively easy manner. A chip file assembly may also be used to provide for the mechanical and electrical coupling of a plurality of edge-mountable chips to a bus of a circuit board with relative ease. Assemblies for securing horizontal chip packages are also described.

Protocol For Communication With Dynamic Memory

US Patent:
6591353, Jul 8, 2003
Filed:
May 1, 2000
Appl. No.:
09/561868
Inventors:
Richard Maurice Barth - Palo Alto CA
Frederick Abbot Ware - Los Altos Hills CA
John Bradly Dillon - Palo Alto CA
Donald Charles Stark - Woodside CA
Craig Edward Hampel - San Jose CA
Matthew Murdy Griffin - Mountain View CA
Assignee:
Rambus Inc. - Los Altos CA
International Classification:
G06F 1200
US Classification:
711167, 710100, 710107
Abstract:
A system and method for performing data transfers within a computer system is provided. The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line. The system includes a memory device with control circuitry that allows no more than one memory bank powered by any given power supply line to perform sense or precharge operations.

Chip Socket Assembly And Chip File Assembly For Semiconductor Chips

US Patent:
6619973, Sep 16, 2003
Filed:
Sep 20, 2001
Appl. No.:
09/957815
Inventors:
Donald V. Perino - Los Altos CA
Wayne S. Richardson - Cupertino CA
John B. Dillon - Palo Alto CA
Assignee:
Rambus, Inc. - Los Altos CA
International Classification:
H01R 909
US Classification:
439327, 439330
Abstract:
A chip socket assembly provides for the mechanical and electrical coupling of edge-mountable chips to a bus of a circuit board with relative ease. An edge-mountable chip may be placed in a slot defined by a base. A clip may be attached to the base to retain the chip in the base. Alternatively, the base and the package of the chip may be configured such that the chip mates with the base in retaining the chip in the base. With the chip socket assembly, users may add, remove, or replace single chips and therefore expand the functionality of a system with the granularity of a single chip in a relatively easy manner. A chip file assembly may also be used to provide for the mechanical and electrical coupling of a plurality of edge-mountable chips to a bus of a circuit board with relative ease. Assemblies for securing horizontal chip packages are also described.

Protocol For Communication With Dynamic Memory

US Patent:
6810449, Oct 26, 2004
Filed:
Jan 10, 2000
Appl. No.:
09/480767
Inventors:
Richard Maurice Barth - Palo Alto CA
Frederick Abbot Ware - Los Altos Hills CA
John Bradly Dillon - Palo Alto CA
Donald Charles Stark - Woodside CA
Craig Edward Hampel - San Jose CA
Matthew Murdy Griffin - Mountain View CA
Assignee:
Rambus, Inc. - Los Altos CA
International Classification:
G06F 300
US Classification:
710 61, 710 32, 710 33, 365233
Abstract:
A system and method for performing data transfers within a computer system is provided The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line. The system includes a memory device with control circuitry that allows no more than one memory bank powered by any given power supply line to perform sense or precharge operations.

Isbn (Books And Publications)

Removal Of Causes From State Courts To Federal Courts, With Forms Adapted To The Several Acts Of Congress On The Subject

Author:
John F. Dillon
ISBN #:
0837705142

The Laws &Amp; Jurisprudence Of England &Amp; America

Author:
John F. Dillon
ISBN #:
0837720397

The Greek Sophists

Author:
John M. Dillon
ISBN #:
0140436898

The Heirs Of Plato: A Study Of The Old Academy (347-274 Bc)

Author:
John M. Dillon
ISBN #:
0198237669

Morality And Custom In Ancient Greece

Author:
John M. Dillon
ISBN #:
0253217474

A Classical Lexicon For Finnegans Wake: A Glossary Of The Greek And Latin In Major Works Of Joyce

Author:
John M. Dillon
ISBN #:
0520030826

The Middle Platonists, 80 B.c. To A.d. 220

Author:
John M. Dillon
ISBN #:
0801410835

The Middle Platonists: 80 B.c. To A.d. 220

Author:
John M. Dillon
ISBN #:
0801483166

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