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John A Mosca, Age 6320 Copeland St, Watertown, MA 02472

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Known as:
North Mosca
Related to:
Caroline B Pease 59 Eric D Marks 62

John Mosca Phones & Addresses

20 Copeland St, Watertown, MA 02472 (617) 924-9224

69 Forest St, Watertown, MA 02472 (617) 923-2801 (617) 923-6013 (617) 926-8445

East Watertown, MA

Hopkinton, MA

Boston, MA

Mentions for John A Mosca

John Mosca resumes & CV records

Resumes

John Mosca Photo 34

Field Service Technician

Location:
Watertown, MA
Work:
Acuative
Field Service Technician
Education:
Benjamin Franklin Institute of Technology
Emerson College
John Mosca Photo 35

John Mosca

John Mosca Photo 36

John Mosca

John Mosca Photo 37

John Mosca

John Mosca Photo 38

John Mosca

John Mosca Photo 39

John Mosca

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John Mosca

Publications & IP owners

Us Patents

Gallium Nitride High Electron Mobility Transistor Structure

US Patent:
7226850, Jun 5, 2007
Filed:
May 19, 2005
Appl. No.:
11/132533
Inventors:
William E. Hoke - Wayland MA, US
John J. Mosca - Carlisle MA, US
Assignee:
Raytheon Company - Waltham MA
International Classification:
H01L 29/06
US Classification:
438493, 438483, 257E21127
Abstract:
A semiconductor structure, comprising: a substrate; a first aluminum nitride (AlN) layer having an aluminum/reactive nitride (Al/N) flux ratio less than 1 disposed on the substrate; and a second AlN layer having an Al/reactive N flux ratio greater than 1 disposed on the first AlN layer. The substrate is a compound of silicon wherein the first AlN layer is substantially free of silicon.

Gallium Nitride High Electron Mobility Transistor Structure

US Patent:
2007016, Jul 19, 2007
Filed:
Mar 30, 2007
Appl. No.:
11/693763
Inventors:
William Hoke - Wayland MA, US
John Mosca - Carlisle MA, US
International Classification:
H01L 31/00
US Classification:
257192000, 257E29246
Abstract:
A semiconductor structure, comprising: a substrate; a first aluminum nitride (AlN) layer having an aluminum/reactive nitride (Al/N) flux ratio less than 1 disposed on the substrate; and a second AlN layer having an Al/reactive N flux ratio greater than 1 disposed on the first AlN layer. The substrate is a compound of silicon wherein the first AlN layer is substantially free of silicon.

Multi-Layer Wafer Fabrication

US Patent:
6368983, Apr 9, 2002
Filed:
Apr 9, 1999
Appl. No.:
09/291577
Inventors:
William E. Hoke - Wayland MA
Peter S. Lyman - Mendon MA
John J. Mosca - Carlisle MA
Assignee:
Raytheon Company - Lexington MA
International Classification:
H01L 2131
US Classification:
438761, 438763, 438799, 438602, 117108
Abstract:
The invention provides a method of fabricating a wafer including growing a single crystal layer comprising a III-V compound in a first chamber at a temperature above 350Â C. A temperature of a surface of the single crystal layer is reduced to below about 350Â C. in the first chamber. An indium arsenide layer is deposited on the single crystal layer, to form an intermediate structure, in the first chamber at a temperature below 350Â C. and above 100Â C. The intermediate structure is transferred to a second chamber. A surface of the intermediate structure is heated to a temperature above about 600Â C. to remove substantially all of the indium arsenide layer and impurities collected in the indium arsenide layer during the transfer to the second chamber. Another material is deposited on the single crystal layer in the second chamber.

Possible Relatives

Diana L Mosca  Francesco I Mosca  Irene E Mosca  Jennifer Mosca  Joseph J Mosca  Karen A Mosca  Luciano P Mosca  John J Last  John J Stan  John C Stanaway 

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