John Pacourek resumes & CV records
Resumes
John R Pacourek, Age 766425 City Pkwy W UNIT 3303, Eden Prairie, MN 55344
John Pacourek Phones & Addresses
E2726 County Road K, Casco, WI 54205
Eden Prairie, MN
Eagan, MN
Thousand Oaks, CA
Kokomo, IN
Austin, TX
Green Bay, WI
E2726 County Road K, Casco, WI 54205
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Publications & IP owners
Us Patents
Method And Apparatus For Tuning And Aligning An Fm Receiver
US Patent:
5428829, Jun 27, 1995
Filed:
Sep 28, 1992
Appl. No.:
7/952554
Inventors:
David W. Osburn - Kokomo IN
John R. Pacourek - Kokomo IN
Michael J. Easterwood - Kokomo IN
Stephen L. Inman - Kokomo IN
Richard A. Kennedy - Kokomo IN
John R. Pacourek - Kokomo IN
Michael J. Easterwood - Kokomo IN
Stephen L. Inman - Kokomo IN
Richard A. Kennedy - Kokomo IN
Assignee:
Delco Electronics Corporation - Kokomo IN
International Classification:
H04B 116
US Classification:
4551971
Abstract:
A method for tuning and aligning an electronically tuned FM broadcast receiver is described. The system described compensates for the mismatch of component values between the antenna and RF amplifier tuned circuits, and the IF offset between the local oscillator frequency and the center frequencies of the antenna and RF resonant circuits by developing independent tuning signals for the circuits. The system also provides temperature compensation, and can be aligned without mechanically adjusting inductors and/or capacitors in the tuned circuits.
Fast Locking Phase Locked Loop Frequency Synthesizer
US Patent:
5384551, Jan 24, 1995
Filed:
Feb 25, 1993
Appl. No.:
8/023795
Inventors:
Richard A. Kennedy - Kokomo IN
Richard A. Summe - Kokomo IN
John R. Pacourek - Oak Creek WI
Richard A. Summe - Kokomo IN
John R. Pacourek - Oak Creek WI
Assignee:
Delco Electronics Corporation - Kokomo IN
International Classification:
H03L 7089
H03L 7093
H03L 7107
H03L 718
H03L 7093
H03L 7107
H03L 718
US Classification:
331 17
Abstract:
A radio apparatus with a phase locked loop is disclosed. The apparatus contains a phase detector with first and second inputs, where the first input receiving a reference frequency signal and the second input receives a controllable frequency signal that is controlled by a tuning voltage. Also included is, a loop filter for filtering the output of the phase detector, circuitry for decoding when a phase difference at the inputs of the phase detector exceeds a predetermined value, and a filter bypass circuit. This circuit bypasses operation of the loop filter when the difference at the inputs of the phase detector exceeds a predetermined value, allowing fast voltage changes of the tuning voltage, and providing a short lock time for the phase locked loop.
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