John M Parsey, Age 711321 Desert Flower Ln, Phoenix, AZ 85048

John Parsey Phones & Addresses

1321 Desert Flower Ln, Phoenix, AZ 85048 (480) 460-3119

Boulder, CO

Wyomissing, PA

Tempe, AZ

Morristown, NJ

1321 E Desert Flower Ln, Phoenix, AZ 85048 (602) 460-3119

Work

Position: Administration/Managerial

Education

Degree: Graduate or professional degree

Emails

Mentions for John M Parsey

John Parsey resumes & CV records

Resumes

John Parsey Photo 9

President And Founder

Location:
Phoenix, AZ
Industry:
Semiconductors
Work:
Jmp Materials Consulting
President and Founder
Arizona State University
Professor of Practice
On Semiconductor Jan 2006 - Jun 2014
Director of Advanced Materials Technology and Senior Scientist
Atmi and Ir Episervices Mar 1, 2003 - Dec 1, 2005
Director of Engineering and Chief Technology Officer
Global Communications Technology Corporation Aug 1, 2001 - Feb 1, 2003
Vice President Marketing and Sales, Us and Europe, President of Gctc, Llc Us
Nanovation Oct 1, 2000 - Jul 1, 2001
Vice President Strategic Business Development
Motorola Jun 1994 - Oct 2000
Manager, Materials Engineering, Manager, Advanced Technology Developement
Bandgap Technology Corp Jan 1, 1991 - Jun 1, 1994
Vice President, Operations
Nokia Bell Labs Oct 1987 - Jan 1991
Supervisor, Technology Development
At&T Oct 1, 1982 - Oct 1, 1987
Member of the Technical Staff
On Semiconductor Jun 1974 - Aug 1975
Process Engineer
Education:
Massachusetts Institute of Technology 1978 - 1982
Massachusetts Institute of Technology 1975 - 1978
Michigan State University 1970 - 1974
Bachelors, Bachelor of Science In Electrical Engineering, Electrical Engineering
Skills:
Process Engineering, Semiconductors, Thin Films, Characterization, Engineering, Design of Experiments, Silicon, Mems, Materials Science, Spc, Ic, Optics, Manufacturing, Semiconductor Industry, Simulations, Process Improvement, Engineering Management, R&D, Process Simulation, Cmos, Rf
Interests:
Social Services
Playing Guitars
Languages:
English
German
John Parsey Photo 10

John Parsey

Location:
Phoenix, Arizona Area
Industry:
Semiconductors

Publications & IP owners

Us Patents

Mems Variable Capacitor With Stabilized Electrostatic Drive And Method Therefor

US Patent:
2002002, Feb 28, 2002
Filed:
Oct 16, 2001
Appl. No.:
09/981014
Inventors:
Jenn-Hwa Huang - Gilbert AZ, US
John Parsey - Phoenix AZ, US
International Classification:
H01L021/00
H01L027/14
H01L029/82
H01L029/84
US Classification:
438/048000, 438/050000, 438/052000, 257/414000, 257/415000, 257/417000
Abstract:
A micro electromechanical systems device having variable capacitance is controllable over the full dynamic range and not subject to the “snap effect” common in the prior art. The device features an electrostatic driver () having a driver capacitor of fixed capacitance () in series with a second driver capacitor of variable capacitance (). A MEMS variable capacitor () is controlled by applying an actuation voltage potential to the electrostatic driver (). The electrostatic driver () and MEMS variable capacitor () are integrated in a single, monolithic device.

Semiconductor Device Having Deep Trench Charge Compensation Regions And Method

US Patent:
2007003, Feb 15, 2007
Filed:
Oct 19, 2006
Appl. No.:
11/582889
Inventors:
Gary Loechelt - Tempe AZ, US
John Parsey - Phoenix AZ, US
Peter Zdebel - Austin TX, US
Gordon Grivna - Mesa AZ, US
International Classification:
H01L 29/76
US Classification:
257341000
Abstract:
In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.

Semiconductor Metallization Structure

US Patent:
6140703, Oct 31, 2000
Filed:
Dec 26, 1996
Appl. No.:
8/774304
Inventors:
Wayne A. Cronin - Tempe AZ
Brian L. Scrivner - Mesa AZ
Kirby F. Koetz - Chandler AZ
John M. Parsey - Phoenix AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 2348
US Classification:
257766
Abstract:
A high temperature metallization system for use with a semiconductor device (23). The semiconductor device (23) has a multi-layer metallization system (36). An adhesion layer (37) of the metallization system (36) is formed on a semiconductor substrate (20). A barrier layer (38) that contains a nickel alloy is formed on the adhesion layer (37). A protective layer (39) is formed on the barrier layer (38). The barrier layer (38) inhibits solder components from diffusing toward the semiconductor substrate (20) during high temperature processing.

Micro-Electromechanical Switch

US Patent:
6307169, Oct 23, 2001
Filed:
Feb 1, 2000
Appl. No.:
9/495664
Inventors:
Xi-Qing Sun - Chandler AZ
John Michael Parsey - Phoenix AZ
Jenn-Hwa Huang - Gilbert AZ
Assignee:
Motorola Inc. - Schaumburg IL
International Classification:
H01H 5700
H01P 110
US Classification:
200181
Abstract:
A Micro-Electromechanical System (MEMS) switch (100) having a single, center hinge (120) which supports a membrane-type electrode (104) on a substrate (101). The single, center hinge (120) has a control electrode (104) coupled to the substrate (101) by an anchor (113), a hinge collar (121), a set of hinge arms (122, 123). The control electrode (104) has a shorting bar (106) coupled thereto and is electrically isolated from another control electrode (105), which is formed on the substrate (101). A travel stop (130) is positioned between the substrate and the control electrode (104). Another aspect of the present invention is a Single Pole, Double Throw (SPDT) switch (160) into which is incorporated the single, center hinge (170) and the travel stop (185, 186).

Semiconductor Device Having Deep Trench Charge Compensation Regions And Method

US Patent:
RE44547, Oct 22, 2013
Filed:
Oct 24, 2012
Appl. No.:
13/659077
Inventors:
John M. Parsey - Phoenix AZ, US
Peter J. Zdebel - Gilbert AZ, US
Gordon M. Grivna - Mesa AZ, US
Assignee:
Semiconductor Components Industries, LLC - Phoenix AZ
International Classification:
H01L 29/66
US Classification:
257339, 257133, 257139, 257140, 257146, 257147, 257162, 257342, 257900, 257E29013, 257E29174, 257E29243, 257E2926
Abstract:
In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.

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