John Thomas Shier, Age 5522720 Esther Ave, Cleveland, OH 44126

4959618, Sep 25, 1990

Feb 16, 1989

7/311216

John S. Shier - Apple Valley MN

VTC Incorporated - Bloomington MN

H03D 1300
H03K 906
H03K 513

328155

A differential charge pump for use in a phase locked loop. The charge pump generates a voltage difference signal proportional to the duration of first and second pulse trains provided by a phase comparator. The charge pump includes a differential amplifier for generating the difference signal, first and second RC filter networks connected between the noninverting and inverting terminals of the differential amplifier and a reference node, respectively. Parallel, all-NPN switching networks apply charging current pulses to the first RC filter network in response to the first pulse train and they apply charging current pulses to the second RC filter network in response to the second pulse train.

4851838, Jul 25, 1989

Dec 18, 1987

7/134758

John S. Shier - Apple Valley MN

VTC Incorporated - Bloomington MN

H03M 138

341121

A single chip monolithic integrated successive approximation analog-to-digital converter includes a test mode terminal for receiving shift register test mode control signals and successive approximation mode control signals. Digital test data signals are applied to a test data terminal. A trimmable digital-to-analog converter (DAC) is connected to receive digital signals and converts these signals to analog signals of corresponding values. A successive approximation and shift register is coupled to the test mode terminal and the test data terminal. During post-fabrication processing, the successive approximation and shift register operates in a shift register test mode in response to the test mode control signals. Test signals of a known value are serially received and applied in parallel to the DAC. The DAC can then be trimmed to required specifications.

4774492, Sep 27, 1988

Dec 3, 1986

6/937565

John S. Shier - Apple Valley MN

H01C 1012

338309

A distributed wye resistor network fabricated on an integrated circuit substrate includes a resistive body coupled between two terminal elements. The resistive body includes a plurality of slots extending therethrough between the terminal elements to form a plurality of discrete resistive links. The resistive body therefore has characteristics of an artificial anisotropically conducting medium. The resistive links have a parabolic length profile. The links can be continuously cut, starting with the shortest link, until parameters of the integrated circuit are brought within desired specifications.

5723897, Mar 3, 1998

Jun 7, 1995

8/484675

John Leighton - Anoka MN
John Shier - Apple Valley MN

VTC Inc. - Bloomington MN

H01L 2972
H01L 2706

257563

The present invention implements a novel emitter scheme that maximizes the emitter perimeter to emitter area ratio of an integrated circuit transistor, thereby achieving improved low noise characteristics over the prior art. Emitter regions are disposed in the transistor in discrete "dotted" segments. The dotted emitter segments may be realized by etching into emitter regions defined by an appropriately formed photoresistive overlay, which can be modified without fabrication process changes. The effect is to reduce the total emitter area by half, while maintaining the total emitter perimeter unchanged. As a result, the noise-capacitance product of the transistor is reduced, improving the overall performance of the transistor.

4782320, Nov 1, 1988

Nov 3, 1986

6/926391

John S. Shier - Apple Valley MN

VTC Incorporated - Bloomington MN

H01C 722

338295

A resistor network coupling two terminal leads and adapted to be fabricated on an integrated circuit. A plurality of N-sided meshes are each formed by N resistor elements linked at network nodes. Some of the resistor elements can be cut by a laser under computer control to select a desired resistance value of the network.

5287231, Feb 15, 1994

Oct 6, 1992

7/957612

John S. Shier - Apple Valley MN
Tuan V. Ngo - Eden Prairie MN
Douglas R. Peterson - Minnetonka MN

VTC Inc. - Bloomington MN

G11B 502
G11B 509

360 68

A write circuit for driving a magnetic head in a magnetic storage system which greatly improves the voltage swing across the magnetic head. The write circuit includes data input for receiving data input signals, a predriver current source, a predriver circuit, and a write driver circuit. The predriver circuit is connected to the data input and has first and second predriver current paths. The predriver current paths are connected to a predriver current source. The predriver circuit directs current from the predriver current source through the first and second predriver current paths as a function of the data input signals. The write driver circuit has first and second write currents paths connected across the magnetic head. The first write current path directs current through the magnetic head in a first direction and the second write current path directs current through the magnetic head in a second direction, opposite to the first direction. The predriver circuit and the write driver circuit are connected together in a current mirror configuration to mirror the predriver current from the first and second predriver currents paths into the first and second write driver currents paths, respectively.

5821148, Oct 13, 1998

Jul 12, 1996

8/678971

John Leighton - Anoka MN
John Shier - Apple Valley MN

VTC Inc. - Bloomington MN

H01L 21331

438309

The present invention implements a novel emitter scheme that maximizes the emitter perimeter to emitter area ratio of an integrated circuit transistor, thereby achieving improved low noise characteristics over the prior art. Emitter regions are disposed in the transistor in discrete "dotted " segments. The dotted emitter segments may be realized by etching into emitter regions defined by an appropriately formed photoresistive overlay, which can be modified without fabrication process changes. The effect is to reduce the total emitter area by half, while maintaining the total emitter perimeter unchanged. As a result, the noise-capacitance product of the transistor is reduced, improving the overall performance of the transistor.

5488518, Jan 30, 1996

Aug 15, 1994

8/290479

John S. Shier - Apple Valley MN

VTC Inc. - Bloomington MN

G11B 502
G11B 509

360 67

A data storage system for storing and retrieving data signals on magnetic medium includes a magnetic transducer, a controller for issuing instructions, and a pre-amplifier adaptive to data storage parameters. The pre-amplifier includes a read amplifier having an adjustable gain, a write driver having an adjustable current source, and a serial shift register responsive to the instructions to selectively operate the read amplifier and the write driver and to issue control signals to first and second digital-to-analog converters to adjust the gain of the read amplifier and the current source of the write driver. Preferably first and second multiplexers are responsive to the control signals to select one of a plurality of magnetic transducers.